vxlan: add tunnel cache to graph node

Type: improvement

Signed-off-by: Drenfong Wong <drenfong.wang@intel.com>
Change-Id: Ia81aaa86fe071cbbed028cc85c5f3fa0f1940a0f
This commit is contained in:
Junfeng Wang
2021-03-09 16:44:57 +08:00
committed by John Lo
parent 162b70d50a
commit 290526e3c7
9 changed files with 49 additions and 47 deletions
+6 -10
View File
@@ -870,10 +870,6 @@ ip_geneve_bypass_inline (vlib_main_t * vm,
vtep6_key_t last_vtep6; /* last IPv6 address / fib index
matching a local VTEP address */
vlib_buffer_t *bufs[VLIB_FRAME_SIZE], **b = bufs;
#ifdef CLIB_HAVE_VEC512
vtep4_cache_t vtep4_u512;
clib_memset (&vtep4_u512, 0, sizeof (vtep4_u512));
#endif
from = vlib_frame_vector_args (frame);
n_left_from = frame->n_vectors;
@@ -968,8 +964,8 @@ ip_geneve_bypass_inline (vlib_main_t * vm,
if (is_ip4)
{
#ifdef CLIB_HAVE_VEC512
if (!vtep4_check_vector
(&vxm->vtep_table, b0, ip40, &last_vtep4, &vtep4_u512))
if (!vtep4_check_vector (&vxm->vtep_table, b0, ip40, &last_vtep4,
&vxm->vtep4_u512))
#else
if (!vtep4_check (&vxm->vtep_table, b0, ip40, &last_vtep4))
#endif
@@ -1051,8 +1047,8 @@ ip_geneve_bypass_inline (vlib_main_t * vm,
if (is_ip4)
{
#ifdef CLIB_HAVE_VEC512
if (!vtep4_check_vector
(&vxm->vtep_table, b1, ip41, &last_vtep4, &vtep4_u512))
if (!vtep4_check_vector (&vxm->vtep_table, b1, ip41, &last_vtep4,
&vxm->vtep4_u512))
#else
if (!vtep4_check (&vxm->vtep_table, b1, ip41, &last_vtep4))
#endif
@@ -1171,8 +1167,8 @@ ip_geneve_bypass_inline (vlib_main_t * vm,
if (is_ip4)
{
#ifdef CLIB_HAVE_VEC512
if (!vtep4_check_vector
(&vxm->vtep_table, b0, ip40, &last_vtep4, &vtep4_u512))
if (!vtep4_check_vector (&vxm->vtep_table, b0, ip40, &last_vtep4,
&vxm->vtep4_u512))
#else
if (!vtep4_check (&vxm->vtep_table, b0, ip40, &last_vtep4))
#endif
+5
View File
@@ -186,6 +186,11 @@ typedef struct
vnet_main_t *vnet_main;
u16 msg_id_base;
/* cache for last 8 geneve tunnel */
#ifdef CLIB_HAVE_VEC512
vtep4_cache_t vtep4_u512;
#endif
} geneve_main_t;
extern geneve_main_t geneve_main;