perfmon: added intel internal io pmu support

Added support for the Intel Internal IO Uncore PMU, along with the ability to
format PMU Unit specific names.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I2939f8ade5e5ed63ccf7f3ccd0279d7c72e95a6e
This commit is contained in:
Ray Kinsella
2021-11-02 13:41:06 +00:00
committed by Damjan Marion
parent 5714a49f14
commit 63081acb3f
2 changed files with 82 additions and 9 deletions
+36 -3
View File
@@ -35,10 +35,16 @@ VLIB_REGISTER_LOG_CLASS (if_intel_uncore_log, static) = {
((event) | (umask) << 8 | (edge) << 18 | (any) << 21 | (inv) << 23 | \
(cmask) << 24)
static intel_uncore_unit_type_names_t uncore_unit_names[] = {
{ INTEL_UNCORE_UNIT_IIO,
PERFMON_STRINGS ("PCIe0", "PCIe1", "MCP", "PCIe2", "PCIe3", "CBDMA/DMI") }
};
static perfmon_event_t intel_uncore_events[] = {
#define _(unit, event, umask, n, suffix, desc) \
#define _(unit, event, umask, ch_mask, fc_mask, n, suffix, desc) \
[INTEL_UNCORE_E_##unit##_##n##_##suffix] = { \
.config = (event) | (umask) << 8, \
.config = \
(event) | (umask) << 8 | (u64) (ch_mask) << 36 | (u64) (fc_mask) << 48, \
.name = #n "." #suffix, \
.description = desc, \
.type_from_instance = 1, \
@@ -57,6 +63,32 @@ intel_uncore_instance_name_cmp (void *v1, void *v2)
return strcmp (i1->name, i2->name);
}
static_always_inline u8 *
format_instance_name (intel_uncore_unit_type_t u, char *unit_fmt, u8 socket_id,
u8 ubox)
{
u8 *s = 0;
/* uncore ubox may have specific names */
for (u8 i = 0; i < ARRAY_LEN (uncore_unit_names); i++)
{
intel_uncore_unit_type_names_t *n = &uncore_unit_names[i];
if (n->unit_type == u)
{
u8 *fmt = 0;
fmt = format (0, "%s (%s)", unit_fmt, (n->unit_names[ubox]));
s = format (0, (char *) fmt, socket_id, ubox);
vec_free (fmt);
return s;
}
}
return format (0, unit_fmt, socket_id, ubox);
}
static void
intel_uncore_add_unit (perfmon_source_t *src, intel_uncore_unit_type_t u,
char *name, char *type_str, char *fmt,
@@ -94,7 +126,8 @@ intel_uncore_add_unit (perfmon_source_t *src, intel_uncore_unit_type_t u,
in->type = perf_type;
in->cpu = j;
in->pid = -1;
in->name = (char *) format (0, fmt, socket_by_cpu_id[j], i);
in->name =
(char *) format_instance_name (u, fmt, socket_by_cpu_id[j], i);
vec_terminate_c_string (in->name);
log_debug ("found %s %s", type_str, in->name);
}
+46 -6
View File
@@ -18,7 +18,8 @@
#define foreach_intel_uncore_unit_type \
_ (IMC, "imc", "integrated Memory Controller (iMC)", "iMC%u/%u") \
_ (UPI, "upi", "Ultra Path Interconnect (UPI)", "UPI%u/%u")
_ (UPI, "upi", "Ultra Path Interconnect (UPI)", "UPI%u/%u") \
_ (IIO, "iio", "Internal IO (IIO)", "IIO%u/%u")
typedef enum
{
@@ -28,21 +29,60 @@ typedef enum
INTEL_UNCORE_N_UNITS,
} intel_uncore_unit_type_t;
typedef struct
{
intel_uncore_unit_type_t unit_type;
char **unit_names;
} intel_uncore_unit_type_names_t;
#define PERF_INTEL_CODE(event, umask, edge, any, inv, cmask) \
((event) | (umask) << 8 | (edge) << 18 | (any) << 21 | (inv) << 23 | \
(cmask) << 24)
/* Type, EventCode, UMask, name, suffix, description */
/* Type, EventCode, UMask, ch_mask, fc_mask, name, suffix, description */
#define foreach_intel_uncore_event \
_ (IMC, 0x04, 0x03, UNC_M_CAS_COUNT, RD, \
_ (IMC, 0x04, 0x03, 0, 0, UNC_M_CAS_COUNT, RD, \
"All DRAM Read CAS Commands issued (including underfills)") \
_ (IMC, 0x04, 0x0c, UNC_M_CAS_COUNT, WR, \
_ (IMC, 0x04, 0x0c, 0, 0, UNC_M_CAS_COUNT, WR, \
"All DRAM Write CAS commands issued") \
_ (IMC, 0x04, 0x0f, UNC_M_CAS_COUNT, ALL, "All DRAM CAS commands issued")
_ (IMC, 0x04, 0x0f, 0, 0, UNC_M_CAS_COUNT, ALL, \
"All DRAM CAS commands issued") \
_ (IIO, 0x83, 0x01, 0x1, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART0, WR, \
"Four byte data request of the CPU : Card writing to DRAM") \
_ (IIO, 0x83, 0x01, 0x2, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART1, WR, \
"Four byte data request of the CPU : Card writing to DRAM") \
_ (IIO, 0x83, 0x01, 0x4, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART2, WR, \
"Four byte data request of the CPU : Card writing to DRAM") \
_ (IIO, 0x83, 0x01, 0x8, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART3, WR, \
"Four byte data request of the CPU : Card writing to DRAM") \
_ (IIO, 0x83, 0x04, 0x1, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART0, RD, \
"Four byte data request of the CPU : Card reading from DRAM") \
_ (IIO, 0x83, 0x04, 0x2, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART1, RD, \
"Four byte data request of the CPU : Card reading from DRAM") \
_ (IIO, 0x83, 0x04, 0x4, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART2, RD, \
"Four byte data request of the CPU : Card reading from DRAM") \
_ (IIO, 0x83, 0x04, 0x8, 0x7, UNC_IIO_DATA_REQ_OF_CPU_PART3, RD, \
"Four byte data request of the CPU : Card reading from DRAM") \
_ (IIO, 0xC0, 0x01, 0x1, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART0, WR, \
"Data requested by the CPU : Core writing to Card's MMIO space") \
_ (IIO, 0xC0, 0x01, 0x2, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART1, WR, \
"Data requested by the CPU : Core writing to Card's MMIO space") \
_ (IIO, 0xC0, 0x01, 0x4, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART2, WR, \
"Data requested by the CPU : Core writing to Card's MMIO space") \
_ (IIO, 0xC0, 0x01, 0x8, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART3, WR, \
"Data requested by the CPU : Core writing to Card's MMIO space") \
_ (IIO, 0x83, 0x80, 0x1, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART0, RD, \
"Data requested by the CPU : Core reading from Card's MMIO space") \
_ (IIO, 0x83, 0x80, 0x2, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART1, RD, \
"Data requested by the CPU : Core reading from Card's MMIO space") \
_ (IIO, 0x83, 0x80, 0x4, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART2, RD, \
"Data requested by the CPU : Core reading from Card's MMIO space") \
_ (IIO, 0x83, 0x80, 0x8, 0x7, UNC_IIO_DATA_REQ_BY_CPU_PART3, RD, \
"Data requested by the CPU : Core reading from Card's MMIO space")
typedef enum
{
#define _(unit, event, umask, name, suffix, desc) \
#define _(unit, event, umask, ch_mask, fc_mask, name, suffix, desc) \
INTEL_UNCORE_E_##unit##_##name##_##suffix,
foreach_intel_uncore_event
#undef _