For portabiliy reasons it is better to have all wrapped in clib code.
I.e. instead of using getcpu() we have clib_get_current_numa_node () and
clib_get_current_cpu_id().
Type: refactor
Change-Id: I29b52d7f29bc7f93873402c4070561f564b71c63
Signed-off-by: Damjan Marion <damarion@cisco.com>
- Allow "Microarch model(family)" row to show PASS
revison as either string (like A0, B0) or number (like
1.0, 2.0).
- Fix part number for Marvell CN96XX
Change-Id: Ie01a3960c4e5e481be354dc8bb60f744e5c65737
Signed-off-by: Nitin Saxena <nsaxena@marvell.com>
Combine implementer, part, variant, and revision into one cpu
description line.
For example : ARM (Cortex-A57 PASS 1.2)
* get infos from /proc/cpuinfo
* only recognize armv8 processors
* add all given cavium processors
* Cavium starts counting variants from 1 instead of 0
Change-Id: I4f3820fb13a6bd2a0dc59e28fbe6f48a5b0ceb25
Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
use getauxval(AT_HWCAP) to get the processor capabilities.
The result should be the same as calling
cat /proc/cpuinfo | grep Feature | head -n1
All but one (aes) features have a different name.
handle aes by adding it an arch prefix, which is skipped during print
and a clib_cpu_supports_aes() custom function.
Change-Id: If9830bd5a17bac1bd1b5337dacbb0ddbb8ed6b18
Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
