efefae62de
That's what MSDN tells you to do and that's how to solve the compilation error problem with it.
495 lines
14 KiB
C
495 lines
14 KiB
C
/*
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* Adopted from jemalloc with this license:
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*
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* Copyright (C) 2002-2013 Jason Evans <jasone@canonware.com>.
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* All rights reserved.
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* Copyright (C) 2007-2012 Mozilla Foundation. All rights reserved.
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* Copyright (C) 2009-2013 Facebook, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice(s),
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice(s),
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
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* EVENT SHALL THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ATOMIC_OPS_H__
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#define __ATOMIC_OPS_H__
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#include <assert.h>
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#if defined (__APPLE__)
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# include <libkern/OSAtomic.h>
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#elif defined(_MSC_VER)
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# define NOGDI
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# ifndef NOMINMAX
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# define NOMINMAX
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# endif
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# define WIN32_LEAN_AND_MEAN
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# include <windows.h>
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#elif defined(__arm__)
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/* Attempt to fix compilation error on Debian armel kernel.
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* arm7 architecture does have both 32 and 64bit atomics, however
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* it's gcc doesn't have __GCC_HAVE_SYNC_COMPARE_AND_SWAP_n defined.
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*/
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# define JE_FORCE_SYNC_COMPARE_AND_SWAP_8
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# define JE_FORCE_SYNC_COMPARE_AND_SWAP_4
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#endif
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/* needed for int types */
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#include "../../source/blender/blenlib/BLI_sys_types.h"
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#include <stdlib.h>
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#include <stddef.h>
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/* little macro so inline keyword works */
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#if defined(_MSC_VER)
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# define ATOMIC_INLINE static __forceinline
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#else
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# if (defined(__APPLE__) && defined(__ppc__))
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/* static inline __attribute__ here breaks osx ppc gcc42 build */
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# define ATOMIC_INLINE static __attribute__((always_inline))
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# else
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# define ATOMIC_INLINE static inline __attribute__((always_inline))
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# endif
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#endif
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/* This is becoming a bit nastier that it was originally foreseen,
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* consider using autoconfig detection instead.
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*/
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#if defined(_M_X64) || defined(__amd64__) || defined(__x86_64__) || defined(__s390x__) || defined(__powerpc64__) || defined(__aarch64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__alpha__) || defined(__mips64)
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# define LG_SIZEOF_PTR 3
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# define LG_SIZEOF_INT 2
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#else
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# define LG_SIZEOF_PTR 2
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# define LG_SIZEOF_INT 2
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#endif
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/************************/
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/* Function prototypes. */
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#if (LG_SIZEOF_PTR == 3 || LG_SIZEOF_INT == 3)
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ATOMIC_INLINE uint64_t atomic_add_uint64(uint64_t *p, uint64_t x);
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ATOMIC_INLINE uint64_t atomic_sub_uint64(uint64_t *p, uint64_t x);
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ATOMIC_INLINE uint64_t atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new);
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#endif
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ATOMIC_INLINE uint32_t atomic_add_uint32(uint32_t *p, uint32_t x);
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ATOMIC_INLINE uint32_t atomic_sub_uint32(uint32_t *p, uint32_t x);
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ATOMIC_INLINE uint32_t atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new);
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ATOMIC_INLINE uint8_t atomic_fetch_and_and_uint8(uint8_t *p, uint8_t b);
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ATOMIC_INLINE size_t atomic_add_z(size_t *p, size_t x);
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ATOMIC_INLINE size_t atomic_sub_z(size_t *p, size_t x);
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ATOMIC_INLINE size_t atomic_cas_z(size_t *v, size_t old, size_t _new);
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ATOMIC_INLINE unsigned atomic_add_u(unsigned *p, unsigned x);
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ATOMIC_INLINE unsigned atomic_sub_u(unsigned *p, unsigned x);
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ATOMIC_INLINE unsigned atomic_cas_u(unsigned *v, unsigned old, unsigned _new);
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/******************************************************************************/
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/* 64-bit operations. */
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#if (LG_SIZEOF_PTR == 3 || LG_SIZEOF_INT == 3)
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# ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
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ATOMIC_INLINE uint64_t
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atomic_add_uint64(uint64_t *p, uint64_t x)
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{
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return __sync_add_and_fetch(p, x);
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}
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ATOMIC_INLINE uint64_t
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atomic_sub_uint64(uint64_t *p, uint64_t x)
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{
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return __sync_sub_and_fetch(p, x);
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}
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ATOMIC_INLINE uint64_t
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atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new)
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{
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return __sync_val_compare_and_swap(v, old, _new);
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}
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#elif (defined(_MSC_VER))
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ATOMIC_INLINE uint64_t
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atomic_add_uint64(uint64_t *p, uint64_t x)
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{
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return InterlockedExchangeAdd64((int64_t *)p, (int64_t)x) + x;
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}
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ATOMIC_INLINE uint64_t
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atomic_sub_uint64(uint64_t *p, uint64_t x)
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{
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return InterlockedExchangeAdd64((int64_t *)p, -((int64_t)x)) - x;
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}
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ATOMIC_INLINE uint64_t
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atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new)
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{
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return InterlockedCompareExchange64((int64_t *)v, _new, old);
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}
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#elif (defined(__APPLE__))
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ATOMIC_INLINE uint64_t
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atomic_add_uint64(uint64_t *p, uint64_t x)
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{
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return (uint64_t)OSAtomicAdd64((int64_t)x, (int64_t *)p);
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}
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ATOMIC_INLINE uint64_t
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atomic_sub_uint64(uint64_t *p, uint64_t x)
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{
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return (uint64_t)OSAtomicAdd64(-((int64_t)x), (int64_t *)p);
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}
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ATOMIC_INLINE uint64_t
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atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new)
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{
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uint64_t init_val = *v;
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OSAtomicCompareAndSwap64((int64_t)old, (int64_t)_new, (int64_t *)v);
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return init_val;
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}
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# elif (defined(__amd64__) || defined(__x86_64__))
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ATOMIC_INLINE uint64_t
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atomic_add_uint64(uint64_t *p, uint64_t x)
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{
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asm volatile (
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"lock; xaddq %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return x;
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}
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ATOMIC_INLINE uint64_t
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atomic_sub_uint64(uint64_t *p, uint64_t x)
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{
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x = (uint64_t)(-(int64_t)x);
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asm volatile (
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"lock; xaddq %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return x;
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}
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ATOMIC_INLINE uint64_t
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atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new)
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{
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uint64_t ret;
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asm volatile (
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"lock; cmpxchgq %2,%1"
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: "=a" (ret), "+m" (*v)
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: "r" (_new), "0" (old)
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: "memory");
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return ret;
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}
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# elif (defined(JEMALLOC_ATOMIC9))
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ATOMIC_INLINE uint64_t
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atomic_add_uint64(uint64_t *p, uint64_t x)
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{
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/*
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* atomic_fetchadd_64() doesn't exist, but we only ever use this
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* function on LP64 systems, so atomic_fetchadd_long() will do.
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*/
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assert(sizeof(uint64_t) == sizeof(unsigned long));
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return atomic_fetchadd_long(p, (unsigned long)x) + x;
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}
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ATOMIC_INLINE uint64_t
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atomic_sub_uint64(uint64_t *p, uint64_t x)
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{
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assert(sizeof(uint64_t) == sizeof(unsigned long));
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return atomic_fetchadd_long(p, (unsigned long)(-(long)x)) - x;
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}
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ATOMIC_INLINE uint64_t
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atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new)
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{
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assert(sizeof(uint64_t) == sizeof(unsigned long));
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return atomic_cmpset_long(v, old, _new);
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}
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# elif (defined(JE_FORCE_SYNC_COMPARE_AND_SWAP_8))
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ATOMIC_INLINE uint64_t
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atomic_add_uint64(uint64_t *p, uint64_t x)
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{
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return __sync_add_and_fetch(p, x);
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}
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ATOMIC_INLINE uint64_t
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atomic_sub_uint64(uint64_t *p, uint64_t x)
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{
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return __sync_sub_and_fetch(p, x);
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}
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ATOMIC_INLINE uint64_t
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atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new)
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{
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return __sync_val_compare_and_swap(v, old, _new);
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}
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# else
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# error "Missing implementation for 64-bit atomic operations"
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# endif
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#endif
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/******************************************************************************/
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/* 32-bit operations. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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ATOMIC_INLINE uint32_t
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atomic_add_uint32(uint32_t *p, uint32_t x)
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{
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return __sync_add_and_fetch(p, x);
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}
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ATOMIC_INLINE uint32_t
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atomic_sub_uint32(uint32_t *p, uint32_t x)
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{
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return __sync_sub_and_fetch(p, x);
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}
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ATOMIC_INLINE uint32_t
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atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new)
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{
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return __sync_val_compare_and_swap(v, old, _new);
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}
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#elif (defined(_MSC_VER))
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ATOMIC_INLINE uint32_t
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atomic_add_uint32(uint32_t *p, uint32_t x)
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{
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return InterlockedExchangeAdd(p, x) + x;
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}
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ATOMIC_INLINE uint32_t
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atomic_sub_uint32(uint32_t *p, uint32_t x)
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{
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return InterlockedExchangeAdd(p, -((int32_t)x)) - x;
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}
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ATOMIC_INLINE uint32_t
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atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new)
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{
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return InterlockedCompareExchange((long *)v, _new, old);
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}
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#elif (defined(__APPLE__))
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ATOMIC_INLINE uint32_t
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atomic_add_uint32(uint32_t *p, uint32_t x)
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{
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return (uint32_t)OSAtomicAdd32((int32_t)x, (int32_t *)p);
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}
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ATOMIC_INLINE uint32_t
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atomic_sub_uint32(uint32_t *p, uint32_t x)
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{
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return (uint32_t)OSAtomicAdd32(-((int32_t)x), (int32_t *)p);
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}
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ATOMIC_INLINE uint32_t
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atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new)
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{
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uint32_t init_val = *v;
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OSAtomicCompareAndSwap32((int32_t)old, (int32_t)_new, (int32_t *)v);
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return init_val;
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}
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#elif (defined(__i386__) || defined(__amd64__) || defined(__x86_64__))
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ATOMIC_INLINE uint32_t
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atomic_add_uint32(uint32_t *p, uint32_t x)
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{
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asm volatile (
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"lock; xaddl %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return x;
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}
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ATOMIC_INLINE uint32_t
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atomic_sub_uint32(uint32_t *p, uint32_t x)
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{
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x = (uint32_t)(-(int32_t)x);
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asm volatile (
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"lock; xaddl %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return x;
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}
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ATOMIC_INLINE uint32_t
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atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new)
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{
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uint32_t ret;
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asm volatile (
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"lock; cmpxchgl %2,%1"
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: "=a" (ret), "+m" (*v)
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: "r" (_new), "0" (old)
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: "memory");
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return ret;
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}
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#elif (defined(JEMALLOC_ATOMIC9))
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ATOMIC_INLINE uint32_t
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atomic_add_uint32(uint32_t *p, uint32_t x)
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{
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return atomic_fetchadd_32(p, x) + x;
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}
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ATOMIC_INLINE uint32_t
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atomic_sub_uint32(uint32_t *p, uint32_t x)
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{
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return atomic_fetchadd_32(p, (uint32_t)(-(int32_t)x)) - x;
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}
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ATOMIC_INLINE uint32_t
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atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new)
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{
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return atomic_cmpset_32(v, old, _new);
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}
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#elif defined(JE_FORCE_SYNC_COMPARE_AND_SWAP_4)
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ATOMIC_INLINE uint32_t
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atomic_add_uint32(uint32_t *p, uint32_t x)
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{
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return __sync_add_and_fetch(p, x);
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}
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ATOMIC_INLINE uint32_t
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atomic_sub_uint32(uint32_t *p, uint32_t x)
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{
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return __sync_sub_and_fetch(p, x);
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}
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ATOMIC_INLINE uint32_t
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atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new)
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{
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return __sync_val_compare_and_swap(v, old, _new);
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}
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#else
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# error "Missing implementation for 32-bit atomic operations"
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#endif
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/******************************************************************************/
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/* 8-bit operations. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
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ATOMIC_INLINE uint8_t
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atomic_fetch_and_and_uint8(uint8_t *p, uint8_t b)
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{
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return __sync_fetch_and_and(p, b);
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}
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#elif (defined(_MSC_VER))
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#include <intrin.h>
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#pragma intrinsic(_InterlockedAnd8)
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ATOMIC_INLINE uint8_t
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atomic_fetch_and_and_uint8(uint8_t *p, uint8_t b)
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{
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#if (LG_SIZEOF_PTR == 3 || LG_SIZEOF_INT == 3)
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return InterlockedAnd8((char *)p, (char)b);
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#else
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return _InterlockedAnd8((char *)p, (char)b);
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#endif
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}
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#else
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# error "Missing implementation for 8-bit atomic operations"
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#endif
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/******************************************************************************/
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/* size_t operations. */
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ATOMIC_INLINE size_t
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atomic_add_z(size_t *p, size_t x)
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{
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assert(sizeof(size_t) == 1 << LG_SIZEOF_PTR);
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#if (LG_SIZEOF_PTR == 3)
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return (size_t)atomic_add_uint64((uint64_t *)p, (uint64_t)x);
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#elif (LG_SIZEOF_PTR == 2)
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return (size_t)atomic_add_uint32((uint32_t *)p, (uint32_t)x);
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#endif
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}
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ATOMIC_INLINE size_t
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atomic_sub_z(size_t *p, size_t x)
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{
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assert(sizeof(size_t) == 1 << LG_SIZEOF_PTR);
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#if (LG_SIZEOF_PTR == 3)
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return (size_t)atomic_add_uint64((uint64_t *)p,
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(uint64_t)-((int64_t)x));
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#elif (LG_SIZEOF_PTR == 2)
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return (size_t)atomic_add_uint32((uint32_t *)p,
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(uint32_t)-((int32_t)x));
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#endif
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}
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ATOMIC_INLINE size_t
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atomic_cas_z(size_t *v, size_t old, size_t _new)
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{
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assert(sizeof(size_t) == 1 << LG_SIZEOF_PTR);
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#if (LG_SIZEOF_PTR == 3)
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return (size_t)atomic_cas_uint64((uint64_t *)v,
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(uint64_t)old,
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(uint64_t)_new);
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#elif (LG_SIZEOF_PTR == 2)
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return (size_t)atomic_cas_uint32((uint32_t *)v,
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(uint32_t)old,
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(uint32_t)_new);
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#endif
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}
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/******************************************************************************/
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/* unsigned operations. */
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ATOMIC_INLINE unsigned
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atomic_add_u(unsigned *p, unsigned x)
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{
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assert(sizeof(unsigned) == 1 << LG_SIZEOF_INT);
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#if (LG_SIZEOF_INT == 3)
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return (unsigned)atomic_add_uint64((uint64_t *)p, (uint64_t)x);
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#elif (LG_SIZEOF_INT == 2)
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return (unsigned)atomic_add_uint32((uint32_t *)p, (uint32_t)x);
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#endif
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}
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ATOMIC_INLINE unsigned
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atomic_sub_u(unsigned *p, unsigned x)
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{
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assert(sizeof(unsigned) == 1 << LG_SIZEOF_INT);
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|
|
|
#if (LG_SIZEOF_INT == 3)
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|
return (unsigned)atomic_add_uint64((uint64_t *)p,
|
|
(uint64_t)-((int64_t)x));
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|
#elif (LG_SIZEOF_INT == 2)
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|
return (unsigned)atomic_add_uint32((uint32_t *)p,
|
|
(uint32_t)-((int32_t)x));
|
|
#endif
|
|
}
|
|
|
|
ATOMIC_INLINE unsigned
|
|
atomic_cas_u(unsigned *v, unsigned old, unsigned _new)
|
|
{
|
|
assert(sizeof(unsigned) == 1 << LG_SIZEOF_INT);
|
|
|
|
#if (LG_SIZEOF_PTR == 3)
|
|
return (unsigned)atomic_cas_uint64((uint64_t *)v,
|
|
(uint64_t)old,
|
|
(uint64_t)_new);
|
|
#elif (LG_SIZEOF_PTR == 2)
|
|
return (unsigned)atomic_cas_uint32((uint32_t *)v,
|
|
(uint32_t)old,
|
|
(uint32_t)_new);
|
|
#endif
|
|
}
|
|
|
|
#endif /* __ATOMIC_OPS_H__ */
|