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Simplified getting PCI topology for the OpenCL backend.

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XMRig 2024-11-08 13:03:35 +07:00
parent 064cd3ef20
commit cd2fd9d7a6
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GPG Key ID: 446A53638BE94409
3 changed files with 30 additions and 25 deletions
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17
src/backend/common/misc/PciTopology.h
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@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2024 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -19,10 +19,8 @@
#ifndef XMRIG_PCITOPOLOGY_H
#define XMRIG_PCITOPOLOGY_H
#include <cstdio>
#include "base/tools/String.h"
@ -33,7 +31,14 @@ class PciTopology
{
public:
PciTopology() = default;
PciTopology(uint32_t bus, uint32_t device, uint32_t function) : m_valid(true), m_bus(bus), m_device(device), m_function(function) {}
template<typename T>
inline PciTopology(T bus, T device, T function)
: m_valid(true),
m_bus(static_cast<uint8_t>(bus)),
m_device(static_cast<uint8_t>(device)),
m_function(static_cast<uint8_t>(function))
{}
inline bool isEqual(const PciTopology &other) const { return m_valid == other.m_valid && toUint32() == other.toUint32(); }
inline bool isValid() const { return m_valid; }
@ -70,4 +75,4 @@ private:
} // namespace xmrig
#endif /* XMRIG_PCITOPOLOGY_H */
#endif // XMRIG_PCITOPOLOGY_H

9
src/backend/cuda/wrappers/CudaDevice.cpp
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@ -5,8 +5,8 @@
* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
* Copyright 2018-2020 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright 2018-2024 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -22,7 +22,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "backend/cuda/wrappers/CudaDevice.h"
#include "3rdparty/rapidjson/document.h"
#include "backend/cuda/CudaThreads.h"
@ -41,7 +40,7 @@
xmrig::CudaDevice::CudaDevice(uint32_t index, int32_t bfactor, int32_t bsleep) :
m_index(index)
{
auto ctx = CudaLib::alloc(index, bfactor, bsleep);
auto *ctx = CudaLib::alloc(index, bfactor, bsleep);
if (!CudaLib::deviceInfo(ctx, 0, 0, Algorithm::INVALID)) {
CudaLib::release(ctx);
@ -50,7 +49,7 @@ xmrig::CudaDevice::CudaDevice(uint32_t index, int32_t bfactor, int32_t bsleep) :
m_ctx = ctx;
m_name = CudaLib::deviceName(ctx);
m_topology = PciTopology(CudaLib::deviceUint(ctx, CudaLib::DevicePciBusID), CudaLib::deviceUint(ctx, CudaLib::DevicePciDeviceID), 0);
m_topology = { CudaLib::deviceUint(ctx, CudaLib::DevicePciBusID), CudaLib::deviceUint(ctx, CudaLib::DevicePciDeviceID), 0U };
}

29
src/backend/opencl/wrappers/OclDevice.cpp
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@ -35,17 +35,18 @@
#include <map>
// NOLINTNEXTLINE(modernize-use-using)
typedef union
{
struct { cl_uint type; cl_uint data[5]; } raw;
struct { cl_uint type; cl_char unused[17]; cl_char bus; cl_char device; cl_char function; } pcie;
} topology_amd;
namespace xmrig {
struct topology_amd {
cl_uint type;
cl_char unused[17];
cl_char bus;
cl_char device;
cl_char function;
};
#ifdef XMRIG_ALGO_RANDOMX
extern bool ocl_generic_rx_generator(const OclDevice &device, const Algorithm &algorithm, OclThreads &threads);
#endif
@ -138,18 +139,18 @@ xmrig::OclDevice::OclDevice(uint32_t index, cl_device_id id, cl_platform_id plat
m_type = getType(m_name);
if (m_extensions.contains("cl_amd_device_attribute_query")) {
topology_amd topology;
if (OclLib::getDeviceInfo(id, CL_DEVICE_TOPOLOGY_AMD, sizeof(topology), &topology, nullptr) == CL_SUCCESS && topology.raw.type == CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD) {
m_topology = PciTopology(static_cast<uint32_t>(topology.pcie.bus), static_cast<uint32_t>(topology.pcie.device), static_cast<uint32_t>(topology.pcie.function));
topology_amd topology{};
if (OclLib::getDeviceInfo(id, CL_DEVICE_TOPOLOGY_AMD, sizeof(topology), &topology) == CL_SUCCESS && topology.type == CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD) {
m_topology = { topology.bus, topology.device, topology.function };
}
m_board = OclLib::getString(id, CL_DEVICE_BOARD_NAME_AMD);
}
else if (m_extensions.contains("cl_nv_device_attribute_query")) {
cl_uint bus = 0;
if (OclLib::getDeviceInfo(id, CL_DEVICE_PCI_BUS_ID_NV, sizeof(bus), &bus, nullptr) == CL_SUCCESS) {
if (OclLib::getDeviceInfo(id, CL_DEVICE_PCI_BUS_ID_NV, sizeof(bus), &bus) == CL_SUCCESS) {
cl_uint slot = OclLib::getUint(id, CL_DEVICE_PCI_SLOT_ID_NV);
m_topology = PciTopology(bus, (slot >> 3) & 0xff, slot & 7);
m_topology = { bus, (slot >> 3) & 0xff, slot & 7 };
}
}
}