IAR ARM Cortex-A port layer.
This commit is contained in:
Richard Barry
403
FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
Normal file
403
FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
Normal file
File diff suppressed because it is too large
Load Diff
144
FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h
Normal file
144
FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h
Normal file
@ -0,0 +1,144 @@
|
|||||||
|
;/*
|
||||||
|
; FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; ***************************************************************************
|
||||||
|
; * *
|
||||||
|
; * FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
; * Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
; * available. *
|
||||||
|
; * *
|
||||||
|
; * Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
; * ensuring you get running as quickly as possible and with an *
|
||||||
|
; * in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
; * the FreeRTOS project to continue with its mission of providing *
|
||||||
|
; * professional grade, cross platform, de facto standard solutions *
|
||||||
|
; * for microcontrollers - completely free of charge! *
|
||||||
|
; * *
|
||||||
|
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
; * *
|
||||||
|
; * Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
; * *
|
||||||
|
; ***************************************************************************
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; This file is part of the FreeRTOS distribution.
|
||||||
|
;
|
||||||
|
; FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
; the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
; >>>NOTE<<< The modification to the GPL is included to allow you to
|
||||||
|
; distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
; provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||||
|
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||||
|
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
; more details. You should have received a copy of the GNU General Public
|
||||||
|
; License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||||
|
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||||
|
; by writing to Richard Barry, contact details for whom are available on the
|
||||||
|
; FreeRTOS WEB site.
|
||||||
|
;
|
||||||
|
; 1 tab == 4 spaces!
|
||||||
|
;
|
||||||
|
; http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||||
|
; contact details.
|
||||||
|
;
|
||||||
|
; http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||||
|
; critical systems.
|
||||||
|
;
|
||||||
|
; http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||||
|
; licensing and training services.
|
||||||
|
;*/
|
||||||
|
|
||||||
|
EXTERN vTaskSwitchContext
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||||||
|
EXTERN ulCriticalNesting
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||||||
|
EXTERN pxCurrentTCB
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||||||
|
EXTERN ulPortTaskHasFPUContext
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|
EXTERN ulAsmAPIPriorityMask
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||||||
|
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||||||
|
portSAVE_CONTEXT macro
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||||||
|
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||||||
|
; Save the LR and SPSR onto the system mode stack before switching to
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|
; system mode to save the remaining system mode registers
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||||||
|
SRSDB sp!, #SYS_MODE
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||||||
|
CPS #SYS_MODE
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||||||
|
PUSH {R0-R12, R14}
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||||||
|
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||||||
|
; Push the critical nesting count
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|
LDR R2, =ulCriticalNesting
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||||||
|
LDR R1, [R2]
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||||||
|
PUSH {R1}
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||||||
|
|
||||||
|
; Does the task have a floating point context that needs saving? If
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||||||
|
; ulPortTaskHasFPUContext is 0 then no.
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||||||
|
LDR R2, =ulPortTaskHasFPUContext
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||||||
|
LDR R3, [R2]
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||||||
|
CMP R3, #0
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||||||
|
|
||||||
|
; Save the floating point context, if any
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|
FMRXNE R1, FPSCR
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|
VPUSHNE {D0-D15}
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|
VPUSHNE {D16-D31}
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||||||
|
PUSHNE {R1}
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||||||
|
|
||||||
|
; Save ulPortTaskHasFPUContext itself
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||||||
|
PUSH {R3}
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||||||
|
|
||||||
|
; Save the stack pointer in the TCB
|
||||||
|
LDR R0, =pxCurrentTCB
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||||||
|
LDR R1, [R0]
|
||||||
|
STR SP, [R1]
|
||||||
|
|
||||||
|
endm
|
||||||
|
|
||||||
|
; /**********************************************************************/
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||||||
|
|
||||||
|
portRESTORE_CONTEXT macro
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||||||
|
|
||||||
|
; Switch to system mode
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|
CPS #SYS_MODE
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||||||
|
|
||||||
|
; Set the SP to point to the stack of the task being restored.
|
||||||
|
LDR R0, =pxCurrentTCB
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||||||
|
LDR R1, [R0]
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||||||
|
LDR SP, [R1]
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||||||
|
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||||||
|
; Is there a floating point context to restore? If the restored
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|
; ulPortTaskHasFPUContext is zero then no.
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|
LDR R0, =ulPortTaskHasFPUContext
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|
POP {R1}
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|
STR R1, [R0]
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||||||
|
CMP R1, #0
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||||||
|
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||||||
|
; Restore the floating point context, if any
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||||||
|
LDMFDNE SP!, {R0}
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||||||
|
VPOPNE {D16-D31}
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||||||
|
VPOPNE {D0-D15}
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||||||
|
VMSRNE FPSCR, R0
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||||||
|
|
||||||
|
; Restore the critical section nesting depth
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||||||
|
LDR R0, =ulCriticalNesting
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||||||
|
POP {R1}
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||||||
|
STR R1, [R0]
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||||||
|
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||||||
|
; Ensure the priority mask is correct for the critical nesting depth
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|
LDR R2, =portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS
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||||||
|
CMP R1, #0
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|
MOVEQ R4, #255
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||||||
|
LDRNE R4, =( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT )
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||||||
|
STR R4, [r2]
|
||||||
|
|
||||||
|
; Restore all system mode registers other than the SP (which is already
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||||||
|
; being used)
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||||||
|
POP {R0-R12, R14}
|
||||||
|
|
||||||
|
; Return to the task code, loading CPSR on the way.
|
||||||
|
RFEIA sp!
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||||||
|
|
||||||
|
endm
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
196
FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s
Normal file
196
FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s
Normal file
@ -0,0 +1,196 @@
|
|||||||
|
;/*
|
||||||
|
; FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; ***************************************************************************
|
||||||
|
; * *
|
||||||
|
; * FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
; * Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
; * available. *
|
||||||
|
; * *
|
||||||
|
; * Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
; * ensuring you get running as quickly as possible and with an *
|
||||||
|
; * in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
; * the FreeRTOS project to continue with its mission of providing *
|
||||||
|
; * professional grade, cross platform, de facto standard solutions *
|
||||||
|
; * for microcontrollers - completely free of charge! *
|
||||||
|
; * *
|
||||||
|
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
; * *
|
||||||
|
; * Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
; * *
|
||||||
|
; ***************************************************************************
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; This file is part of the FreeRTOS distribution.
|
||||||
|
;
|
||||||
|
; FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
; the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
; >>>NOTE<<< The modification to the GPL is included to allow you to
|
||||||
|
; distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
; provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||||
|
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||||
|
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
; more details. You should have received a copy of the GNU General Public
|
||||||
|
; License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||||
|
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||||
|
; by writing to Richard Barry, contact details for whom are available on the
|
||||||
|
; FreeRTOS WEB site.
|
||||||
|
;
|
||||||
|
; 1 tab == 4 spaces!
|
||||||
|
;
|
||||||
|
; http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||||
|
; contact details.
|
||||||
|
;
|
||||||
|
; http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||||
|
; critical systems.
|
||||||
|
;
|
||||||
|
; http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||||
|
; licensing and training services.
|
||||||
|
;*/
|
||||||
|
|
||||||
|
INCLUDE FreeRTOSConfig.h
|
||||||
|
INCLUDE portmacro.h
|
||||||
|
|
||||||
|
EXTERN vApplicationIRQHandler
|
||||||
|
EXTERN vTaskSwitchContext
|
||||||
|
EXTERN ulPortYieldRequired
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||||||
|
EXTERN ulPortInterruptNesting
|
||||||
|
|
||||||
|
PUBLIC FreeRTOS_SWI_Handler
|
||||||
|
PUBLIC FreeRTOS_IRQ_Handler
|
||||||
|
PUBLIC vPortRestoreTaskContext
|
||||||
|
|
||||||
|
SYS_MODE EQU 0x1f
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||||||
|
SVC_MODE EQU 0x13
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||||||
|
IRQ_MODE EQU 0x12
|
||||||
|
|
||||||
|
|
||||||
|
SECTION .text:CODE:ROOT(2)
|
||||||
|
ARM
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||||||
|
|
||||||
|
INCLUDE portASM.h
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
; SVC handler is used to start the scheduler and yield a task.
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
FreeRTOS_SWI_Handler
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
|
||||||
|
; Save the context of the current task and select a new task to run.
|
||||||
|
portSAVE_CONTEXT
|
||||||
|
LDR R0, =vTaskSwitchContext
|
||||||
|
BLX R0
|
||||||
|
|
||||||
|
vPortRestoreTaskContext
|
||||||
|
portRESTORE_CONTEXT
|
||||||
|
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
; PL390 GIC interrupt handler
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
FreeRTOS_IRQ_Handler
|
||||||
|
|
||||||
|
; Return to the interrupted instruction.
|
||||||
|
SUB lr, lr, #4
|
||||||
|
|
||||||
|
; Push the return address and SPSR
|
||||||
|
PUSH {lr}
|
||||||
|
MRS lr, SPSR
|
||||||
|
PUSH {lr}
|
||||||
|
|
||||||
|
; Change to supervisor mode to allow reentry.
|
||||||
|
CPS #SVC_MODE
|
||||||
|
|
||||||
|
; Push used registers.
|
||||||
|
PUSH {r0-r4, r12}
|
||||||
|
|
||||||
|
; Increment nesting count. r3 holds the address of ulPortInterruptNesting
|
||||||
|
; for future use. r1 holds the original ulPortInterruptNesting value for
|
||||||
|
; future use.
|
||||||
|
LDR r3, =ulPortInterruptNesting
|
||||||
|
LDR r1, [r3]
|
||||||
|
ADD r4, r1, #1
|
||||||
|
STR r4, [r3]
|
||||||
|
|
||||||
|
; Read value from the interrupt acknowledge register, which is stored in r0
|
||||||
|
; for future parameter and interrupt clearing use.
|
||||||
|
LDR r2, =portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS
|
||||||
|
LDR r0, [r2]
|
||||||
|
|
||||||
|
; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
|
||||||
|
; future use.
|
||||||
|
MOV r2, sp
|
||||||
|
AND r2, r2, #4
|
||||||
|
SUB sp, sp, r2
|
||||||
|
|
||||||
|
; Call the interrupt handler
|
||||||
|
PUSH {r0-r3, lr}
|
||||||
|
BL vApplicationIRQHandler
|
||||||
|
POP {r0-r3, lr}
|
||||||
|
ADD sp, sp, r2
|
||||||
|
|
||||||
|
CPSID i
|
||||||
|
|
||||||
|
; Write the value read from ICCIAR to ICCEOIR
|
||||||
|
LDR r4, =portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS
|
||||||
|
STR r0, [r4]
|
||||||
|
|
||||||
|
; Restore the old nesting count
|
||||||
|
STR r1, [r3]
|
||||||
|
|
||||||
|
; A context switch is never performed if the nesting count is not 0
|
||||||
|
CMP r1, #0
|
||||||
|
BNE exit_without_switch
|
||||||
|
|
||||||
|
; Did the interrupt request a context switch? r1 holds the address of
|
||||||
|
; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
|
||||||
|
; use.
|
||||||
|
LDR r1, =ulPortYieldRequired
|
||||||
|
LDR r0, [r1]
|
||||||
|
CMP r0, #0
|
||||||
|
BNE switch_before_exit
|
||||||
|
|
||||||
|
exit_without_switch
|
||||||
|
; No context switch. Restore used registers, LR_irq and SPSR before
|
||||||
|
; returning.
|
||||||
|
POP {r0-r4, r12}
|
||||||
|
CPS #IRQ_MODE
|
||||||
|
POP {LR}
|
||||||
|
MSR SPSR_cxsf, LR
|
||||||
|
POP {LR}
|
||||||
|
MOVS PC, LR
|
||||||
|
|
||||||
|
switch_before_exit
|
||||||
|
; A context swtich is to be performed. Clear the context switch pending
|
||||||
|
; flag.
|
||||||
|
MOV r0, #0
|
||||||
|
STR r0, [r1]
|
||||||
|
|
||||||
|
; Restore used registers, LR-irq and SPSR before saving the context
|
||||||
|
; to the task stack.
|
||||||
|
POP {r0-r4, r12}
|
||||||
|
CPS #IRQ_MODE
|
||||||
|
POP {LR}
|
||||||
|
MSR SPSR_cxsf, LR
|
||||||
|
POP {LR}
|
||||||
|
portSAVE_CONTEXT
|
||||||
|
|
||||||
|
; Call the function that selects the new task to execute.
|
||||||
|
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
||||||
|
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
||||||
|
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
||||||
|
BL vTaskSwitchContext
|
||||||
|
|
||||||
|
; Restore the context of, and branch to, the task selected to execute next.
|
||||||
|
portRESTORE_CONTEXT
|
||||||
|
|
||||||
|
|
||||||
|
END
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
221
FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
Normal file
221
FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
Normal file
@ -0,0 +1,221 @@
|
|||||||
|
/*
|
||||||
|
FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||||
|
|
||||||
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||||
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
* Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
* available. *
|
||||||
|
* *
|
||||||
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
* ensuring you get running as quickly as possible and with an *
|
||||||
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
* the FreeRTOS project to continue with its mission of providing *
|
||||||
|
* professional grade, cross platform, de facto standard solutions *
|
||||||
|
* for microcontrollers - completely free of charge! *
|
||||||
|
* *
|
||||||
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
* *
|
||||||
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||||
|
distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
kernel.
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||||
|
details. You should have received a copy of the GNU General Public License
|
||||||
|
and the FreeRTOS license exception along with FreeRTOS; if not it can be
|
||||||
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||||
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||||
|
on the FreeRTOS WEB site.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems, who sell the code with commercial support,
|
||||||
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef PORTMACRO_H
|
||||||
|
#define PORTMACRO_H
|
||||||
|
|
||||||
|
/* IAR includes. */
|
||||||
|
#ifdef __ICCARM__
|
||||||
|
#include <intrinsics.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Port specific definitions.
|
||||||
|
*
|
||||||
|
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||||
|
* and compiler.
|
||||||
|
*
|
||||||
|
* These settings should not be altered.
|
||||||
|
*-----------------------------------------------------------
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Type definitions. */
|
||||||
|
#define portCHAR char
|
||||||
|
#define portFLOAT float
|
||||||
|
#define portDOUBLE double
|
||||||
|
#define portLONG long
|
||||||
|
#define portSHORT short
|
||||||
|
#define portSTACK_TYPE unsigned long
|
||||||
|
#define portBASE_TYPE portLONG
|
||||||
|
typedef unsigned long portTickType;
|
||||||
|
#define portMAX_DELAY ( portTickType ) 0xffffffff
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Hardware specifics. */
|
||||||
|
#define portSTACK_GROWTH ( -1 )
|
||||||
|
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||||
|
#define portBYTE_ALIGNMENT 8
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Task utilities. */
|
||||||
|
|
||||||
|
/* Called at the end of an ISR that can cause a context switch. */
|
||||||
|
#define portEND_SWITCHING_ISR( xSwitchRequired )\
|
||||||
|
{ \
|
||||||
|
extern unsigned long ulPortYieldRequired; \
|
||||||
|
\
|
||||||
|
if( xSwitchRequired != pdFALSE ) \
|
||||||
|
{ \
|
||||||
|
ulPortYieldRequired = pdTRUE; \
|
||||||
|
} \
|
||||||
|
}
|
||||||
|
|
||||||
|
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||||
|
#define portYIELD() __asm( "SWI 0" );
|
||||||
|
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Critical section control
|
||||||
|
*----------------------------------------------------------*/
|
||||||
|
|
||||||
|
extern void vPortEnterCritical( void );
|
||||||
|
extern void vPortExitCritical( void );
|
||||||
|
extern unsigned long ulPortSetInterruptMask( void );
|
||||||
|
extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );
|
||||||
|
|
||||||
|
/* These macros do not globally disable/enable interrupts. They do mask off
|
||||||
|
interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
|
||||||
|
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||||
|
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||||
|
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
|
||||||
|
#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
|
||||||
|
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||||
|
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||||
|
not required for this port but included in case common demo code that uses these
|
||||||
|
macros is used. */
|
||||||
|
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||||
|
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||||
|
|
||||||
|
/* Prototype of the FreeRTOS tick handler. This must be installed as the
|
||||||
|
handler for whichever peripheral is used to generate the RTOS tick. */
|
||||||
|
void FreeRTOS_Tick_Handler( void );
|
||||||
|
|
||||||
|
/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
|
||||||
|
before any floating point instructions are executed. */
|
||||||
|
void vPortTaskUsesFPU( void );
|
||||||
|
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
|
||||||
|
|
||||||
|
#define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
|
||||||
|
#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
|
||||||
|
|
||||||
|
/* Architecture specific optimisations. */
|
||||||
|
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||||
|
|
||||||
|
/* Store/clear the ready priorities in a bit map. */
|
||||||
|
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||||
|
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )
|
||||||
|
|
||||||
|
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ICCARM__ */
|
||||||
|
|
||||||
|
#define portNOP() __asm volatile( "NOP" )
|
||||||
|
|
||||||
|
|
||||||
|
/* The number of bits to shift for an interrupt priority is dependent on the
|
||||||
|
number of bits implemented by the interrupt controller. */
|
||||||
|
#if configUNIQUE_INTERRUPT_PRIORITIES == 16
|
||||||
|
#define portPRIORITY_SHIFT 4
|
||||||
|
#elif configUNIQUE_INTERRUPT_PRIORITIES == 32
|
||||||
|
#define portPRIORITY_SHIFT 3
|
||||||
|
#elif configUNIQUE_INTERRUPT_PRIORITIES == 64
|
||||||
|
#define portPRIORITY_SHIFT 2
|
||||||
|
#elif configUNIQUE_INTERRUPT_PRIORITIES == 128
|
||||||
|
#define portPRIORITY_SHIFT 1
|
||||||
|
#elif configUNIQUE_INTERRUPT_PRIORITIES == 256
|
||||||
|
#define portPRIORITY_SHIFT 0
|
||||||
|
#else
|
||||||
|
#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Interrupt controller access addresses. */
|
||||||
|
#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )
|
||||||
|
#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )
|
||||||
|
#define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )
|
||||||
|
#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
|
||||||
|
#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
|
||||||
|
#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
|
||||||
|
#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
|
||||||
|
#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* PORTMACRO_H */
|
||||||
|
|
||||||
Reference in New Issue
Block a user