FreeRTOS source updates:
+ Add the pre-existing 64-bit Cortex-A53 port layer into the head revision of the main repository. Demo application updates: + Update Zynq demo to use SDK version 2015.4 + Add task static allocation standard demo to Zynq demo. + Make the XScuGic object accessible outside of the vConfigureTickInterrupt(), again in the Zynq demo.
This commit is contained in:
Richard Barry
@ -133,6 +133,7 @@
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#define configUSE_APPLICATION_TASK_TAG 0
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configUSE_QUEUE_SETS 1
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#define configSUPPORT_STATIC_ALLOCATION 1
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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@ -78,6 +78,7 @@
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#define XSCUTIMER_CLOCK_HZ ( XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2UL )
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static XScuTimer xTimer;
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XScuGic xInterruptController; /* Interrupt controller instance */
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/*
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* The application must provide a function that configures a peripheral to
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@ -87,7 +88,6 @@ static XScuTimer xTimer;
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*/
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void vConfigureTickInterrupt( void )
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{
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static XScuGic xInterruptController; /* Interrupt controller instance */
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BaseType_t xStatus;
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extern void FreeRTOS_Tick_Handler( void );
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XScuTimer_Config *pxTimerConfig;
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@ -150,6 +150,7 @@
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#include "EventGroupsDemo.h"
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#include "TaskNotify.h"
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#include "IntSemTest.h"
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#include "StaticAllocation.h"
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/* Priorities for the demo application tasks. */
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#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
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@ -258,7 +259,7 @@ void main_full( void )
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vStartEventGroupTasks();
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vStartTaskNotifyTask();
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vStartInterruptSemaphoreTasks();
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vStartStaticallyAllocatedTasks();
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/* Start the tasks that implements the command console on the UART, as
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described above. */
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@ -400,17 +401,22 @@ unsigned long ulErrorFound = pdFALSE;
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ulErrorFound |= 1UL << 14UL;
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}
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if( xAreStaticAllocationTasksStillRunning() != pdPASS )
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{
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ulErrorFound |= 1UL << 15UL;
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}
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/* Check that the register test 1 task is still running. */
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if( ulLastRegTest1Value == ulRegTest1LoopCounter )
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{
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ulErrorFound |= 1UL << 15UL;
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ulErrorFound |= 1UL << 16UL;
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}
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ulLastRegTest1Value = ulRegTest1LoopCounter;
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/* Check that the register test 2 task is still running. */
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if( ulLastRegTest2Value == ulRegTest2LoopCounter )
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{
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ulErrorFound |= 1UL << 16UL;
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ulErrorFound |= 1UL << 17UL;
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}
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ulLastRegTest2Value = ulRegTest2LoopCounter;
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@ -403,6 +403,30 @@ const uint32_t ulMaxDivisor = 0xff, ulDivisorShift = 0x08;
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XScuWdt_SetTimerMode( &xWatchDogInstance );
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XScuWdt_Start( &xWatchDogInstance );
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}
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/*-----------------------------------------------------------*/
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void vApplicationGetIdleTaskMemory( DummyTCB_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint16_t *pusIdleTaskStackSize )
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{
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/* configUSE_STATIC_ALLOCATION is set to 1, so the application has the
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opportunity to supply the buffers that will be used by the Idle task as its
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stack and to hold its TCB. If these are set to NULL then the buffers will
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be allocated dynamically, just as if xTaskCreate() had been called. */
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*ppxIdleTaskTCBBuffer = NULL;
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*ppxIdleTaskStackBuffer = NULL;
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*pusIdleTaskStackSize = configMINIMAL_STACK_SIZE; /* In words. NOT in bytes! */
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}
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/*-----------------------------------------------------------*/
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void vApplicationGetTimerTaskMemory( DummyTCB_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint16_t *pusTimerTaskStackSize )
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{
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/* configUSE_STATIC_ALLOCATION is set to 1, so the application has the
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opportunity to supply the buffers that will be used by the Timer/RTOS daemon
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task as its stack and to hold its TCB. If these are set to NULL then the
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buffers will be allocated dynamically, just as if xTaskCreate() had been
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called. */
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*ppxTimerTaskTCBBuffer = NULL;
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*ppxTimerTaskStackBuffer = NULL;
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*pusTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; /* In words. NOT in bytes! */
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}
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@ -22,8 +22,8 @@
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*
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*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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*XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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@ -33,6 +33,9 @@
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/**
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*
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* @file xadcps.h
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* @addtogroup xadcps_v2_0
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* @{
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* @details
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*
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* The XAdcPs driver supports the Xilinx XADC/ADC device.
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*
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@ -557,3 +560,4 @@ void XAdcPs_IntrClear(XAdcPs *InstancePtr, u32 Mask);
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#endif
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#endif /* End of protection macro. */
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/** @} */
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@ -33,6 +33,8 @@
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/**
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*
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* @file xadcps_hw.h
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* @addtogroup xadcps_v2_0
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* @{
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*
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* This header file contains identifiers and basic driver functions (or
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* macros) that can be used to access the XADC device through the Device
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@ -497,3 +499,4 @@ extern "C" {
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#endif
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#endif /* End of protection macro. */
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/** @} */
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@ -33,6 +33,9 @@
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/**
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*
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* @file xcanps.h
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* @addtogroup canps_v2_0
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* @{
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* @details
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*
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* The Xilinx CAN driver component. This component supports the Xilinx
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* CAN Controller.
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@ -559,3 +562,4 @@ XCanPs_Config *XCanPs_LookupConfig(u16 DeviceId);
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#endif /* end of protection macro */
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/** @} */
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@ -33,6 +33,8 @@
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/**
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*
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* @file xcanps_hw.h
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* @addtogroup canps_v2_0
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* @{
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*
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* This header file contains the identifiers and basic driver functions (or
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* macros) that can be used to access the device. Other driver functions
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@ -364,3 +366,4 @@ void XCanPs_ResetHw(u32 BaseAddr);
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#endif /* end of protection macro */
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/** @} */
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@ -33,7 +33,11 @@
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/**
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*
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* @file xcpu_cortexa9.h
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* @addtogroup cpu_cortexa9_v2_0
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* @{
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||||
* @details
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||||
*
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* dummy file
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*
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******************************************************************************/
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/** @} */
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@ -33,6 +33,9 @@
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/**
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*
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* @file xdevcfg.h
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* @addtogroup devcfg_v3_1
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* @{
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* @details
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*
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* The is the main header file for the Device Configuration Interface of the Zynq
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* device. The device configuration interface has three main functionality.
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@ -378,3 +381,4 @@ void XDcfg_SetHandler(XDcfg *InstancePtr, void *CallBackFunc,
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#endif
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#endif /* end of protection macro */
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/** @} */
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@ -33,6 +33,8 @@
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/**
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||||
*
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* @file xdevcfg_hw.h
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* @addtogroup devcfg_v3_1
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||||
* @{
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||||
*
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* This file contains the hardware interface to the Device Config Interface.
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||||
*
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||||
@ -390,3 +392,4 @@ void XDcfg_ResetHw(u32 BaseAddr);
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#endif
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#endif /* end of protection macro */
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/** @} */
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@ -33,6 +33,9 @@
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/**
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||||
*
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||||
* @file xdmaps.h
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* @addtogroup dmaps_v2_0
|
||||
* @{
|
||||
* @details
|
||||
*
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||||
*
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||||
* <pre>
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||||
@ -314,3 +317,4 @@ int XDmaPs_SelfTest(XDmaPs *InstPtr);
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||||
#endif
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||||
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||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
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||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
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||||
* @file xdmaps_hw.h
|
||||
* @addtogroup dmaps_v2_0
|
||||
* @{
|
||||
*
|
||||
* This header file contains the hardware interface of an XDmaPs device.
|
||||
*
|
||||
@ -288,3 +290,4 @@ void XDmaPs_ResetHw(u32 BaseAddr);
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||||
#endif
|
||||
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||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
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||||
@ -33,6 +33,9 @@
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||||
/**
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||||
*
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||||
* @file xemacps.h
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||||
* @addtogroup emacps_v2_0
|
||||
* @{
|
||||
* @details
|
||||
*
|
||||
* The Xilinx Embedded Processor Block Ethernet driver.
|
||||
*
|
||||
@ -710,3 +713,4 @@ void XEmacPs_DMABLengthUpdate(XEmacPs *InstancePtr, int BLength);
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||||
#endif
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||||
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||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
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@ -34,6 +34,8 @@
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||||
/**
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||||
*
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||||
* @file xemacps_bd.h
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||||
* @addtogroup emacps_v2_0
|
||||
* @{
|
||||
*
|
||||
* This header provides operations to manage buffer descriptors in support
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||||
* of scatter-gather DMA.
|
||||
@ -726,3 +728,4 @@ typedef u32 XEmacPs_Bd[XEMACPS_BD_NUM_WORDS];
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||||
#endif
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||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
@ -34,6 +34,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xemacps_bdring.h
|
||||
* @addtogroup emacps_v2_0
|
||||
* @{
|
||||
*
|
||||
* The Xiline EmacPs Buffer Descriptor ring driver. This is part of EmacPs
|
||||
* DMA functionalities.
|
||||
@ -231,3 +233,4 @@ int XEmacPs_BdRingCheck(XEmacPs_BdRing * RingPtr, u8 Direction);
|
||||
|
||||
|
||||
#endif /* end of protection macros */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xemacps_hw.h
|
||||
* @addtogroup emacps_v2_0
|
||||
* @{
|
||||
*
|
||||
* This header file contains identifiers and low-level driver functions (or
|
||||
* macros) that can be used to access the PS Ethernet MAC (XEmacPs) device.
|
||||
@ -594,3 +596,4 @@ void XEmacPs_ResetHw(u32 BaseAddr);
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,9 @@
|
||||
/**
|
||||
*
|
||||
* @file xgpiops.h
|
||||
* @addtogroup gpiops_v2_1
|
||||
* @{
|
||||
* @details
|
||||
*
|
||||
* The Xilinx PS GPIO driver. This driver supports the Xilinx PS GPIO
|
||||
* Controller.
|
||||
@ -253,3 +256,4 @@ XGpioPs_Config *XGpioPs_LookupConfig(u16 DeviceId);
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xgpiops_hw.h
|
||||
* @addtogroup gpiops_v2_1
|
||||
* @{
|
||||
*
|
||||
* This header file contains the identifiers and basic driver functions (or
|
||||
* macros) that can be used to access the device. Other driver functions
|
||||
@ -148,3 +150,4 @@ void XGpioPs_ResetHw(u32 BaseAddress);
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* XGPIOPS_HW_H */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,9 @@
|
||||
/**
|
||||
*
|
||||
* @file xiicps.h
|
||||
* @addtogroup iicps_v2_1
|
||||
* @{
|
||||
* @details
|
||||
*
|
||||
* This is an implementation of IIC driver in the PS block. The device can
|
||||
* be either a master or a slave on the IIC bus. This implementation supports
|
||||
@ -399,3 +402,4 @@ u32 XIicPs_GetSClk(XIicPs *InstancePtr);
|
||||
|
||||
#endif /* end of protection macro */
|
||||
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xiicps_hw.h
|
||||
* @addtogroup iicps_v2_1
|
||||
* @{
|
||||
*
|
||||
* This header file contains the hardware definition for an IIC device.
|
||||
* It includes register definitions and interface functions to read/write
|
||||
@ -377,3 +379,4 @@ void XIicPs_ResetHw(u32 BaseAddr);
|
||||
|
||||
#endif /* end of protection macro */
|
||||
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,9 @@
|
||||
/**
|
||||
*
|
||||
* @file xqspips.h
|
||||
* @addtogroup qspips_v3_0
|
||||
* @{
|
||||
* @details
|
||||
*
|
||||
* This file contains the implementation of the XQspiPs driver. It supports only
|
||||
* master mode. User documentation for the driver functions is contained in this
|
||||
@ -779,3 +782,4 @@ void XQspiPs_GetDelays(XQspiPs *InstancePtr, u8 *DelayNss, u8 *DelayBtwn,
|
||||
|
||||
#endif /* end of protection macro */
|
||||
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xqspips_hw.h
|
||||
* @addtogroup qspips_v3_0
|
||||
* @{
|
||||
*
|
||||
* This header file contains the identifiers and basic HW access driver
|
||||
* functions (or macros) that can be used to access the device. Other driver
|
||||
@ -370,3 +372,4 @@ void XQspiPs_LinearInit(u32 BaseAddress);
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,9 @@
|
||||
/**
|
||||
*
|
||||
* @file xscugic.h
|
||||
* @addtogroup scugic_v2_1
|
||||
* @{
|
||||
* @details
|
||||
*
|
||||
* The generic interrupt controller driver component.
|
||||
*
|
||||
@ -313,3 +316,4 @@ int XScuGic_SelfTest(XScuGic *InstancePtr);
|
||||
|
||||
#endif /* end of protection macro */
|
||||
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xscugic_hw.h
|
||||
* @addtogroup scugic_v2_1
|
||||
* @{
|
||||
*
|
||||
* This header file contains identifiers and HW access functions (or
|
||||
* macros) that can be used to access the device. The user should refer to the
|
||||
@ -630,3 +632,4 @@ void XScuGic_GetPriTrigTypeByDistAddr(u32 DistBaseAddress, u32 Int_Id,
|
||||
|
||||
#endif /* end of protection macro */
|
||||
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,9 @@
|
||||
/**
|
||||
*
|
||||
* @file xscutimer.h
|
||||
* @addtogroup scutimer_v2_0
|
||||
* @{
|
||||
* @details
|
||||
*
|
||||
* The timer driver supports the Cortex A9 private timer.
|
||||
*
|
||||
@ -359,3 +362,4 @@ u8 XScuTimer_GetPrescaler(XScuTimer *InstancePtr);
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xscutimer_hw.h
|
||||
* @addtogroup scutimer_v2_0
|
||||
* @{
|
||||
*
|
||||
* This file contains the hardware interface to the Timer.
|
||||
*
|
||||
@ -281,3 +283,4 @@ extern "C" {
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,9 @@
|
||||
/**
|
||||
*
|
||||
* @file xscuwdt.h
|
||||
* @addtogroup scuwdt_v2_0
|
||||
* @{
|
||||
* @details
|
||||
*
|
||||
* The Xilinx SCU watchdog timer driver (XScuWdt) supports the Xilinx SCU private
|
||||
* watchdog timer hardware.
|
||||
@ -378,3 +381,4 @@ int XScuWdt_SelfTest(XScuWdt *InstancePtr);
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
/**
|
||||
*
|
||||
* @file xscuwdt_hw.h
|
||||
* @addtogroup scuwdt_v2_0
|
||||
* @{
|
||||
*
|
||||
* This file contains the hardware interface to the Xilinx SCU private Watch Dog
|
||||
* Timer (XSCUWDT).
|
||||
@ -176,3 +178,4 @@ extern "C" {
|
||||
#endif
|
||||
|
||||
#endif /* end of protection macro */
|
||||
/** @} */
|
||||
|
||||
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Reference in New Issue
Block a user