Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
This commit is contained in:
Richard Barry
@ -528,5 +528,17 @@ typedef portBASE_TYPE (*pdTASK_HOOK_CODE)( void * );
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#define vPortFreeAligned( pvBlockToFree ) vPortFree( pvBlockToFree )
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#endif
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#ifndef portSUPPRESS_TICKS_AND_SLEEP
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#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )
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#endif
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#ifndef portPRE_SLEEP_PROCESSING
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#define portPRE_SLEEP_PROCESSING()
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#endif
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#ifndef portPOST_SLEEP_PROCESSING
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#define portPOST_SLEEP_PROCESSING()
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#endif
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#endif /* INC_FREERTOS_H */
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@ -1320,6 +1320,27 @@ unsigned portBASE_TYPE uxTaskGetTaskNumber( xTaskHandle xTask );
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*/
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void vTaskSetTaskNumber( xTaskHandle xTask, unsigned portBASE_TYPE uxHandle );
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/*
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* Return the amount of time, in ticks, that will pass before the kernel will
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* next move a task from the Blocked state to the Running state.
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*/
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portTickType xTaskGetExpectedIdleTime( void );
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/*
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* If tickless mode is being used, or a low power mode is implemented, then
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* the tick interrupt will not execute during idle periods. When this is the
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* case, the tick count value maintained by the scheduler needs to be kept up
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* to date with the actual execution time by being skipped forward by the by
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* a time equal to the idle period.
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*/
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void vTaskStepTick( portTickType xTicksToJump );
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/*
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* Returns the number of tick interrupts that have occurred while the scheduler
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* has been suspended. The count pending ticks is reset if xResetOnExit is set
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* to pdTRUE.
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*/
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unsigned portBASE_TYPE uxTaskPendingTicksGet( portBASE_TYPE xResetOnExit );
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#ifdef __cplusplus
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}
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350
FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
Normal file
350
FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
Normal file
File diff suppressed because it is too large
Load Diff
263
FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm
Normal file
263
FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm
Normal file
@ -0,0 +1,263 @@
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;/*
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; FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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;
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;
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; ***************************************************************************
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; * *
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||||
; * FreeRTOS tutorial books are available in pdf and paperback. *
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||||
; * Complete, revised, and edited pdf reference manuals are also *
|
||||
; * available. *
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||||
; * *
|
||||
; * Purchasing FreeRTOS documentation will not only help you, by *
|
||||
; * ensuring you get running as quickly as possible and with an *
|
||||
; * in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
; * the FreeRTOS project to continue with its mission of providing *
|
||||
; * professional grade, cross platform, de facto standard solutions *
|
||||
; * for microcontrollers - completely free of charge! *
|
||||
; * *
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||||
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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; * *
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; * Thank you for using FreeRTOS, and thank you for your support! *
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; * *
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; ***************************************************************************
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;
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;
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; This file is part of the FreeRTOS distribution.
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;
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||||
; FreeRTOS is free software; you can redistribute it and/or modify it under
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||||
; the terms of the GNU General Public License (version 2) as published by the
|
||||
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
; >>>NOTE<<< The modification to the GPL is included to allow you to
|
||||
; distribute a combined work that includes FreeRTOS without being obliged to
|
||||
; provide the source code for proprietary components outside of the FreeRTOS
|
||||
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
; more details. You should have received a copy of the GNU General Public
|
||||
; License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
; by writing to Richard Barry, contact details for whom are available on the
|
||||
; FreeRTOS WEB site.
|
||||
;
|
||||
; 1 tab == 4 spaces!
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||||
;
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||||
; http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
; contact details.
|
||||
;
|
||||
; http://www.SafeRTOS.com - A version that is certified for use in safety
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; critical systems.
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;
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; http://www.OpenRTOS.com - Commercial support, development, porting,
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; licensing and training services.
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;*/
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.text
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.arm
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.ref vTaskSwitchContext
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.ref vTaskIncrementTick
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.ref ulTaskHasFPUContext
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.ref pxCurrentTCB
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;/*-----------------------------------------------------------*/
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;
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; Save Task Context
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;
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portSAVE_CONTEXT .macro
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DSB
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; Push R0 as we are going to use it
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STMDB SP!, {R0}
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; Set R0 to point to the task stack pointer.
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STMDB SP,{SP}^
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SUB SP, SP, #4
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LDMIA SP!,{R0}
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; Push the return address onto the stack.
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STMDB R0!, {LR}
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; Now LR has been saved, it can be used instead of R0.
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MOV LR, R0
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; Pop R0 so it can be saved onto the task stack.
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LDMIA SP!, {R0}
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; Push all the system mode registers onto the task stack.
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STMDB LR,{R0-LR}^
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SUB LR, LR, #60
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; Push the SPSR onto the task stack.
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MRS R0, SPSR
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STMDB LR!, {R0}
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.if (__TI_VFP_SUPPORT__)
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;Determine if the task maintains an FPU context.
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LDR R0, ulFPUContextConst
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LDR R0, [R0]
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; Test the flag
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CMP R0, #0
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; If the task is not using a floating point context then skip the
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; saving of the FPU registers.
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BEQ PC+3
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FSTMDBD LR!, {D0-D15}
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FMRX R1, FPSCR
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STMFD LR!, {R1}
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; Save the flag
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STMDB LR!, {R0}
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.endif
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; Store the new top of stack for the task.
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LDR R0, pxCurrentTCBConst
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LDR R0, [R0]
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STR LR, [R0]
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.endm
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;/*-----------------------------------------------------------*/
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;
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; Restore Task Context
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;
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portRESTORE_CONTEXT .macro
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LDR R0, pxCurrentTCBConst
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LDR R0, [R0]
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LDR LR, [R0]
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.if (__TI_VFP_SUPPORT__)
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; The floating point context flag is the first thing on the stack.
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LDR R0, ulFPUContextConst
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LDMFD LR!, {R1}
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STR R1, [R0]
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; Test the flag
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CMP R1, #0
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; If the task is not using a floating point context then skip the
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; VFP register loads.
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BEQ PC+3
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; Restore the floating point context.
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LDMFD LR!, {R0}
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FLDMIAD LR!, {D0-D15}
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FMXR FPSCR, R0
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.endif
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; Get the SPSR from the stack.
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LDMFD LR!, {R0}
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MSR SPSR_CF, R0
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; Restore all system mode registers for the task.
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LDMFD LR, {R0-R14}^
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; Restore the return address.
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LDR LR, [LR, #+60]
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; And return - correcting the offset in the LR to obtain the
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; correct address.
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SUBS PC, LR, #4
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.endm
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;/*-----------------------------------------------------------*/
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; Start the first task by restoring its context.
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.def vPortStartFirstTask
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vPortStartFirstTask:
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portRESTORE_CONTEXT
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;/*-----------------------------------------------------------*/
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; Yield to another task.
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.def vPortYieldProcessor
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vPortYieldProcessor:
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; Within an IRQ ISR the link register has an offset from the true return
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; address. SWI doesn't do this. Add the offset manually so the ISR
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; return code can be used.
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ADD LR, LR, #4
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; First save the context of the current task.
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portSAVE_CONTEXT
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; Select the next task to execute. */
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BL vTaskSwitchContext
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; Restore the context of the task selected to execute.
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portRESTORE_CONTEXT
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;/*-----------------------------------------------------------*/
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; Yield to another task from within the FreeRTOS API
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.def vPortYeildWithinAPI
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vPortYeildWithinAPI:
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; Save the context of the current task.
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portSAVE_CONTEXT
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; Clear SSI flag.
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MOVW R0, #0xFFF4
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MOVT R0, #0xFFFF
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LDR R0, [R0]
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; Select the next task to execute. */
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BL vTaskSwitchContext
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; Restore the context of the task selected to execute.
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portRESTORE_CONTEXT
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;/*-----------------------------------------------------------*/
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; Preemptive Tick
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.def vPortPreemptiveTick
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vPortPreemptiveTick:
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; Save the context of the current task.
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portSAVE_CONTEXT
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; Clear interrupt flag
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MOVW R0, #0xFC88
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MOVT R0, #0xFFFF
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MOV R1, #1
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STR R1, [R0]
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; Increment the tick count, making any adjustments to the blocked lists
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; that may be necessary.
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BL vTaskIncrementTick
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; Select the next task to execute.
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BL vTaskSwitchContext
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; Restore the context of the task selected to execute.
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portRESTORE_CONTEXT
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;-------------------------------------------------------------------------------
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.def ulPortCountLeadingZeros
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ulPortCountLeadingZeros:
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CLZ R0, R0
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BX LR
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;-------------------------------------------------------------------------------
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.if (__TI_VFP_SUPPORT__)
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.def vPortInitialiseFPSCR
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vPortInitialiseFPSCR:
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MOV R0, #0
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FMXR FPSCR, R0
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BX LR
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.endif ;__TI_VFP_SUPPORT__
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pxCurrentTCBConst .word pxCurrentTCB
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ulFPUContextConst .word ulTaskHasFPUContext
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;-------------------------------------------------------------------------------
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145
FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
Normal file
145
FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
Normal file
@ -0,0 +1,145 @@
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/*
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FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
>>>NOTE<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong? *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
license and contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool.
|
||||
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
the SafeRTOS brand: http://www.SafeRTOS.com.
|
||||
*/
|
||||
|
||||
#ifndef __PORTMACRO_H__
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#define __PORTMACRO_H__
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
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/* Type definitions. */
|
||||
#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE unsigned long
|
||||
#define portBASE_TYPE long
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|
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#if (configUSE_16_BIT_TICKS == 1)
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typedef unsigned portSHORT portTickType;
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#define portMAX_DELAY (portTickType) 0xFFFF
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#else
|
||||
typedef unsigned portLONG portTickType;
|
||||
#define portMAX_DELAY (portTickType) 0xFFFFFFFFF
|
||||
#endif
|
||||
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH (-1)
|
||||
#define portTICK_RATE_MS ((portTickType) 1000 / configTICK_RATE_HZ)
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
|
||||
/* Critical section handling. */
|
||||
extern void vPortEnterCritical(void);
|
||||
extern void vPortExitCritical(void);
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() asm( " CPSID I" )
|
||||
#define portENABLE_INTERRUPTS() asm( " CPSIE I" )
|
||||
|
||||
/* Scheduler utilities. */
|
||||
#define portYIELD() _call_swi( 0 )
|
||||
#define portSYS_SSIR1_REG ( * ( ( volatile unsigned long * ) 0xFFFFFFB0 ) )
|
||||
#define portSYS_SSIR1_SSKEY ( 0x7500UL )
|
||||
#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
|
||||
#define portYIELD_FROM_ISR() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Generic helper function. */
|
||||
unsigned long ulPortCountLeadingZeros( unsigned long ulBitmap );
|
||||
|
||||
/* Check the configuration. */
|
||||
#if( configMAX_PRIORITIES > 32 )
|
||||
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
|
||||
#endif
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ulPortCountLeadingZeros( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
|
||||
#endif /* __PORTMACRO_H__ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -109,62 +109,36 @@ extern "C" {
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYieldFromISR( void );
|
||||
|
||||
#define portYIELD() vPortYieldFromISR()
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
/*
|
||||
* Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
|
||||
* registers. r0 is clobbered.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK() \
|
||||
__asm volatile \
|
||||
( \
|
||||
" mov r0, %0 \n" \
|
||||
" msr basepri, r0 \n" \
|
||||
::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \
|
||||
)
|
||||
|
||||
/*
|
||||
* Set basepri back to 0 without effective other registers.
|
||||
* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
* http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
|
||||
*/
|
||||
#define portCLEAR_INTERRUPT_MASK() \
|
||||
__asm volatile \
|
||||
( \
|
||||
" mov r0, #0 \n" \
|
||||
" msr basepri, r0 \n" \
|
||||
:::"r0" \
|
||||
)
|
||||
|
||||
/* FAQ: Setting BASEPRI to 0 in portCLEAR_INTERRUPT_MASK_FROM_ISR() is not a
|
||||
bug. Please see http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before
|
||||
disagreeing. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x
|
||||
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
|
||||
#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
extern unsigned long ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask(0)
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portNOP()
|
||||
/* Tickless idle/low power functionality. */
|
||||
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Generic helper function. */
|
||||
@ -189,8 +163,12 @@ extern void vPortExitCritical( void );
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* taskRECORD_READY_PRIORITY */
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* portNOP() is not required by this port. */
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -115,48 +115,17 @@ extern void vPortYieldFromISR( void );
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
/*
|
||||
* Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
|
||||
* registers. r0 is clobbered.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK() \
|
||||
__asm volatile \
|
||||
( \
|
||||
" mov r0, %0 \n" \
|
||||
" msr basepri, r0 \n" \
|
||||
::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \
|
||||
)
|
||||
|
||||
/*
|
||||
* Set basepri back to 0 without effective other registers.
|
||||
* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
* http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
|
||||
*/
|
||||
#define portCLEAR_INTERRUPT_MASK() \
|
||||
__asm volatile \
|
||||
( \
|
||||
" mov r0, #0 \n" \
|
||||
" msr basepri, r0 \n" \
|
||||
:::"r0" \
|
||||
)
|
||||
|
||||
/* FAQ: Setting BASEPRI to 0 in portCLEAR_INTERRUPT_MASK_FROM_ISR() is not a
|
||||
bug. Please see http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before
|
||||
disagreeing. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x
|
||||
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
|
||||
#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
extern unsigned long ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask(0)
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
/* There are an uneven number of items on the initial stack, so
|
||||
portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||
@ -164,16 +133,23 @@ portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portNOP()
|
||||
/* Tickless idle/low power functionality. */
|
||||
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Generic helper function. */
|
||||
__attribute__( ( always_inline ) ) static inline unsigned char ucPortCountLeadingZeros( ulBitmap )
|
||||
__attribute__( ( always_inline ) ) static inline unsigned char ucPortCountLeadingZeros( unsigned long ulBitmap )
|
||||
{
|
||||
unsigned char ucReturn;
|
||||
|
||||
@ -194,8 +170,12 @@ portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* taskRECORD_READY_PRIORITY */
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* portNOP() is not required by this port. */
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
|
||||
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
@ -40,7 +40,7 @@
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
@ -50,17 +50,17 @@
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
license and contact details.
|
||||
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool.
|
||||
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
the SafeRTOS brand: http://www.SafeRTOS.com.
|
||||
*/
|
||||
|
||||
@ -76,15 +76,33 @@
|
||||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the NVIC. */
|
||||
#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
|
||||
#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
|
||||
#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
|
||||
#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
|
||||
#define portNVIC_SYSTICK_CLK 0x00000004
|
||||
#define portNVIC_SYSTICK_INT 0x00000002
|
||||
#define portNVIC_SYSTICK_ENABLE 0x00000001
|
||||
#define portNVIC_PENDSVSET 0x10000000
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
static const unsigned long ulStoppedTimerCompensation = 45UL;
|
||||
#endif
|
||||
#else /* configSYSTICK_CLOCK_HZ */
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
/* Assumes the SysTick clock is slower than the CPU clock. */
|
||||
static const unsigned long ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
||||
#endif
|
||||
#endif /* configSYSTICK_CLOCK_HZ */
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
|
||||
#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
|
||||
#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
|
||||
#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
|
||||
|
||||
@ -119,6 +137,21 @@ extern void vPortStartFirstTask( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The number of SysTick increments that make up one tick period.
|
||||
*/
|
||||
static unsigned long ulTimerReloadValueForOneTick = 0;
|
||||
|
||||
/*
|
||||
* The maximum number of tick periods that can be suppressed is limited by the
|
||||
* 24 bit resolution of the SysTick timer.
|
||||
*/
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
static unsigned long xMaximumPossibleSuppressedTicks = 0;
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
@ -146,13 +179,13 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
|
||||
portBASE_TYPE xPortStartScheduler( void )
|
||||
{
|
||||
/* Make PendSV and SysTick the lowest priority interrupts. */
|
||||
*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
|
||||
*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
|
||||
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
|
||||
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
|
||||
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
|
||||
/* Initialise the critical nesting count ready for the first task. */
|
||||
uxCriticalNesting = 0;
|
||||
|
||||
@ -174,7 +207,7 @@ void vPortEndScheduler( void )
|
||||
void vPortYieldFromISR( void )
|
||||
{
|
||||
/* Set a PendSV to request a context switch. */
|
||||
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
@ -197,30 +230,142 @@ void vPortExitCritical( void )
|
||||
|
||||
void xPortSysTickHandler( void )
|
||||
{
|
||||
unsigned long ulDummy;
|
||||
|
||||
/* If using preemption, also force a context switch. */
|
||||
#if configUSE_PREEMPTION == 1
|
||||
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
#endif
|
||||
|
||||
ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;
|
||||
#endif
|
||||
|
||||
( void ) portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
{
|
||||
vTaskIncrementTick();
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
|
||||
__weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
|
||||
{
|
||||
unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
|
||||
{
|
||||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
tick periods. -1 is used because this code will execute part way
|
||||
through one of the tick periods, and the fraction of a tick period is
|
||||
accounted for later. */
|
||||
ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
is accounted for as best it can be, but using the tickless mode will
|
||||
inevitably result in some tiny drift of the time maintained by the
|
||||
kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
|
||||
|
||||
/* If a context switch is pending then abandon the low power entry as
|
||||
the context switch might have been pended by an external interrupt that
|
||||
requires processing. */
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PENDSVSET_BIT ) != 0 )
|
||||
{
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Adjust the reload value to take into account that the current
|
||||
time slice is already partially complete. */
|
||||
ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
/* Clear the SysTick count flag and set the count value back to
|
||||
zero. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. */
|
||||
portPRE_SLEEP_PROCESSING();
|
||||
__WFI();
|
||||
portPOST_SLEEP_PROCESSING();
|
||||
|
||||
/* Stop SysTick. Again, the time the SysTick is stopped for is
|
||||
accounted for as best it can be, but using the tickless mode will
|
||||
inevitably result in some tiny drift of the time maintained by the
|
||||
kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
|
||||
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
/* The tick interrupt has already executed, and the SysTick
|
||||
count reloaded with the portNVIC_SYSTICK_LOAD_REG value.
|
||||
Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of
|
||||
this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* The tick interrupt handler will already have pended the tick
|
||||
processing in the kernel. As the pending tick will be
|
||||
processed as soon as this function exits, the tick value
|
||||
maintained by the tick is stepped forward by one less than the
|
||||
time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
Work out how long the sleep lasted. */
|
||||
ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
was waiting? */
|
||||
ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;
|
||||
|
||||
/* The reload value is set to whatever fraction of a single tick
|
||||
period remains. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
value. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* #if configUSE_TICKLESS_IDLE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Setup the systick timer to generate the tick interrupts at the required
|
||||
* frequency.
|
||||
*/
|
||||
void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
/* Configure the constants required to setup the tick interrupt. */
|
||||
ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
@ -40,7 +40,7 @@
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
@ -50,51 +50,36 @@
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
license and contact details.
|
||||
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool.
|
||||
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
the SafeRTOS brand: http://www.SafeRTOS.com.
|
||||
*/
|
||||
|
||||
#include <FreeRTOSConfig.h>
|
||||
|
||||
/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
|
||||
defined. The value zero should also ensure backward compatibility.
|
||||
FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
|
||||
#ifndef configKERNEL_INTERRUPT_PRIORITY
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 0
|
||||
#endif
|
||||
|
||||
|
||||
RSEG CODE:CODE(2)
|
||||
thumb
|
||||
|
||||
EXTERN vPortYieldFromISR
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN vTaskSwitchContext
|
||||
|
||||
PUBLIC vSetMSP
|
||||
PUBLIC xPortPendSVHandler
|
||||
PUBLIC vPortSetInterruptMask
|
||||
PUBLIC ulPortSetInterruptMask
|
||||
PUBLIC vPortClearInterruptMask
|
||||
PUBLIC vPortSVCHandler
|
||||
PUBLIC vPortStartFirstTask
|
||||
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vSetMSP
|
||||
msr msp, r0
|
||||
bx lr
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
xPortPendSVHandler:
|
||||
@ -122,28 +107,26 @@ xPortPendSVHandler:
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortSetInterruptMask:
|
||||
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
msr BASEPRI, r0
|
||||
|
||||
ulPortSetInterruptMask:
|
||||
mrs r0, basepri
|
||||
mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
msr basepri, r1
|
||||
bx r14
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortClearInterruptMask:
|
||||
/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
|
||||
mov r0, #0
|
||||
msr BASEPRI, r0
|
||||
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortSVCHandler;
|
||||
vPortSVCHandler:
|
||||
/* Get the location of the current TCB. */
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
/* Pop the core registers. */
|
||||
ldmia r0!, {r4-r11}
|
||||
msr psp, r0
|
||||
mov r0, #0
|
||||
|
||||
@ -106,15 +106,13 @@ extern "C" {
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYieldFromISR( void );
|
||||
|
||||
#define portYIELD() vPortYieldFromISR()
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
@ -131,32 +129,36 @@ extern void vPortYieldFromISR( void );
|
||||
#include <intrinsics.h>
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* taskRECORD_READY_PRIORITY */
|
||||
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern void vPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() vPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() 0;vPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask();(void)x
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
/* Critical section management. */
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern unsigned long ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( unsigned long ulNewMask );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Tickless/low power functionality. */
|
||||
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* portNOP() is not required by this port. */
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -73,7 +73,7 @@
|
||||
EXTERN vTaskSwitchContext
|
||||
|
||||
PUBLIC xPortPendSVHandler
|
||||
PUBLIC vPortSetInterruptMask
|
||||
PUBLIC ulPortSetInterruptMask
|
||||
PUBLIC vPortClearInterruptMask
|
||||
PUBLIC vPortSVCHandler
|
||||
PUBLIC vPortStartFirstTask
|
||||
@ -127,20 +127,16 @@ xPortPendSVHandler:
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortSetInterruptMask:
|
||||
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
msr BASEPRI, r0
|
||||
|
||||
ulPortSetInterruptMask:
|
||||
mrs r0, basepri
|
||||
mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
msr basepri, r1
|
||||
bx r14
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortClearInterruptMask:
|
||||
/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
|
||||
mov r0, #0
|
||||
msr BASEPRI, r0
|
||||
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
@ -159,7 +155,7 @@ vPortSVCHandler:
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortStartFirstTask:
|
||||
vPortStartFirstTask
|
||||
/* Use the NVIC offset register to locate the stack. */
|
||||
ldr r0, =0xE000ED08
|
||||
ldr r0, [r0]
|
||||
|
||||
@ -106,15 +106,13 @@ extern "C" {
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYieldFromISR( void );
|
||||
|
||||
#define portYIELD() vPortYieldFromISR()
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
@ -131,36 +129,42 @@ extern void vPortYieldFromISR( void );
|
||||
#include <intrinsics.h>
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* taskRECORD_READY_PRIORITY */
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern void vPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( void );
|
||||
extern unsigned long ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( unsigned long ulNewMask );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() vPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask()
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() 0;vPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask();(void)x
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* There are an uneven number of items on the initial stack, so
|
||||
portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||
#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Tickless/low power functionality. */
|
||||
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* portNOP() is not required by this port. */
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
|
||||
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
@ -40,7 +40,7 @@
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
@ -50,17 +50,17 @@
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
license and contact details.
|
||||
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool.
|
||||
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
the SafeRTOS brand: http://www.SafeRTOS.com.
|
||||
*/
|
||||
|
||||
@ -69,7 +69,7 @@
|
||||
* The simplest possible implementation of pvPortMalloc(). Note that this
|
||||
* implementation does NOT allow allocated memory to be freed again.
|
||||
*
|
||||
* See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the
|
||||
* See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the
|
||||
* memory management pages of http://www.FreeRTOS.org for more information.
|
||||
*/
|
||||
#include <stdlib.h>
|
||||
@ -92,7 +92,7 @@ static union xRTOS_HEAP
|
||||
volatile portDOUBLE dDummy;
|
||||
#else
|
||||
volatile unsigned long ulDummy;
|
||||
#endif
|
||||
#endif
|
||||
unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
|
||||
} xHeap;
|
||||
|
||||
@ -101,7 +101,7 @@ static size_t xNextFreeByte = ( size_t ) 0;
|
||||
|
||||
void *pvPortMalloc( size_t xWantedSize )
|
||||
{
|
||||
void *pvReturn = NULL;
|
||||
void *pvReturn = NULL;
|
||||
|
||||
/* Ensure that blocks are always aligned to the required number of bytes. */
|
||||
#if portBYTE_ALIGNMENT != 1
|
||||
@ -121,11 +121,11 @@ void *pvReturn = NULL;
|
||||
/* Return the next free byte then increment the index past this
|
||||
block. */
|
||||
pvReturn = &( xHeap.ucHeap[ xNextFreeByte ] );
|
||||
xNextFreeByte += xWantedSize;
|
||||
}
|
||||
xNextFreeByte += xWantedSize;
|
||||
}
|
||||
}
|
||||
xTaskResumeAll();
|
||||
|
||||
|
||||
#if( configUSE_MALLOC_FAILED_HOOK == 1 )
|
||||
{
|
||||
if( pvReturn == NULL )
|
||||
@ -134,7 +134,7 @@ void *pvReturn = NULL;
|
||||
vApplicationMallocFailedHook();
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
return pvReturn;
|
||||
}
|
||||
@ -143,10 +143,10 @@ void *pvReturn = NULL;
|
||||
void vPortFree( void *pv )
|
||||
{
|
||||
/* Memory cannot be freed using this scheme. See heap_2.c, heap_3.c and
|
||||
heap_4.c for alternative implementations, and the memory management pages of
|
||||
heap_4.c for alternative implementations, and the memory management pages of
|
||||
http://www.FreeRTOS.org for more information. */
|
||||
( void ) pv;
|
||||
|
||||
|
||||
/* Force an assert as it is invalid to call this function. */
|
||||
configASSERT( pv == NULL );
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,6 +1,6 @@
|
||||
/*
|
||||
FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.
|
||||
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
@ -40,7 +40,7 @@
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
@ -50,17 +50,17 @@
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
license and contact details.
|
||||
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool.
|
||||
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
the SafeRTOS brand: http://www.SafeRTOS.com.
|
||||
*/
|
||||
|
||||
@ -73,7 +73,7 @@ extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
@ -98,50 +98,41 @@ extern "C" {
|
||||
typedef unsigned portLONG portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffffffff
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYield( void );
|
||||
extern void vPortYieldFromISR( void );
|
||||
|
||||
#define portYIELD() vPortYieldFromISR()
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
extern void vPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( void );
|
||||
extern unsigned long ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( unsigned long ulNewMask );
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() vPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask()
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() 0;vPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask();(void)x
|
||||
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#define portNOP()
|
||||
|
||||
/* Tickless/low power optimisations. */
|
||||
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Port specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
@ -154,11 +145,21 @@ http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* taskRECORD_READY_PRIORITY */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* portNOP() is not required by this port. */
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -106,46 +106,39 @@ extern "C" {
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYield( void );
|
||||
extern void vPortYieldFromISR( void );
|
||||
|
||||
#define portYIELD() vPortYieldFromISR()
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Critical section management. */
|
||||
|
||||
extern void vPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( void );
|
||||
extern unsigned long ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( unsigned long ulNewMask );
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() vPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask()
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
|
||||
#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
|
||||
|
||||
/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() 0;vPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask();(void)x
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* There are an uneven number of items on the initial stack, so
|
||||
portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||
#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#define portNOP()
|
||||
|
||||
/* Tickless/low power optimisations. */
|
||||
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Port specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
@ -158,11 +151,21 @@ portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* taskRECORD_READY_PRIORITY */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not necessary for to use this port. They are defined so the common demo files
|
||||
(which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* portNOP() is not required by this port. */
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user