00ad1a0200
Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review.
2013-11-28 10:48:33 +00:00
f54f21b8f6
Add event_groups.c and associated functions in other core files.
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Added xTimerPendCallbackFromISR() to provide a centralised deferred interrupt handling mechanism.
Add xPortGetLowestEverFreeHeapSize() to heap_4.c.
2013-11-21 21:46:08 +00:00
fa002f7fdd
Final tidy up before V7.6.0 zip file creation.
2013-11-17 15:46:08 +00:00
0cd79ad81d
Change version numbers in preparation for V7.6.0 release.
2013-11-08 11:47:35 +00:00
b181a3af99
Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
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Remove duplicate save/restore of r14 in Cortex-M4F ports.
2013-11-07 16:43:54 +00:00
30bc6c01a9
Add ehb instructions back into PIC32 port layer (upon advice).
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Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
2013-11-07 14:16:32 +00:00
dcd261bb8b
Update the Keil and IAR CM0 port layers to match the changes made to the GCC version.
2013-10-22 11:26:16 +00:00
41fe693968
Improve how the scheduler is started in the GCC Cortex-M0 port.
2013-10-22 09:50:20 +00:00
a12ea2d212
Update FreeRTOS version number to V7.5.3
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Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
2013-10-14 19:56:47 +00:00
94607d83f9
Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer.
2013-10-14 14:03:05 +00:00
0c56f5018d
Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete.
2013-10-08 12:33:46 +00:00
aedf7824cb
Introduce the prvTaskExitError() function for all ARM_CMn ports.
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Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
2013-10-08 11:30:40 +00:00
eaacbb099a
Clear up a few compiler warnings.
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Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt. Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
2013-10-07 12:06:17 +00:00
7ec4773131
Add traceMALLOC() and traceFREE() macros.
2013-10-04 20:56:45 +00:00
73606369c4
Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
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Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
2013-09-01 19:53:24 +00:00
574f5044a6
Starting point for Keil Cortex-M0 port.
2013-08-25 01:01:18 +00:00
c40370e96a
Fix a few typos and remove the "register" keyword.
2013-08-16 13:31:54 +00:00
2f754d9b0c
Add additional critical section to the default tickless implementations.
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Update version number for maintenance release.
2013-07-24 09:45:17 +00:00
3cbe0a724d
Update version number.
2013-07-23 10:51:45 +00:00
bb2093cf5d
Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version.
2013-07-23 09:50:06 +00:00
679a3c670c
Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library.
2013-07-23 09:44:00 +00:00
203ae64600
Rename xTaskGetSystemState() uxTaskGetSystemState().
2013-07-18 14:41:15 +00:00
7d6758ee1a
Minor updates and change version number for V7.5.0 release.
2013-07-17 18:32:57 +00:00
7d1292ced2
Linting and MISRA checking
2013-07-15 14:27:15 +00:00
ce9c3b7413
Variable name change in the PIC32 port layer only.
2013-07-14 13:06:17 +00:00
da0fff63c9
Update Cortex-M MPU version to include new API functions.
2013-07-13 19:37:35 +00:00
e5d9640863
Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined.
2013-07-13 11:31:35 +00:00
4b964814de
Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32.
2013-07-12 19:25:21 +00:00
ad8fa53043
Kernel optimisations.
2013-07-12 11:11:19 +00:00
5d902f2b9c
Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports.
2013-07-11 10:05:06 +00:00
65704174c9
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
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Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
2013-07-09 17:57:59 +00:00
0f6b0d3a59
Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
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Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
2013-07-09 12:49:49 +00:00
c4eef61d39
Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports.
2013-07-04 11:20:28 +00:00
0c0b54c175
Refine the default tickless idle implementation in the Cortex-M3 port layers.
2013-06-30 10:38:31 +00:00
a7c47131fa
Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose.
2013-06-25 13:39:50 +00:00
6cbbfd2eb5
Slight correction to coding standard in heap_2.c and heap_4.c.
2013-06-25 13:25:08 +00:00
fb47260e80
Improve efficiency of memory allocation when the memory block is already aligned correctly.
2013-06-25 12:20:29 +00:00
c3f9e3c5ff
Update RVDS port layer to match IAR port layer.
2013-06-20 14:56:40 +00:00
5013baa2cd
RVDS ARM Cortex-A port layer.
2013-06-20 12:47:21 +00:00
04dafed839
IAR ARM Cortex-A port layer.
2013-06-20 12:20:40 +00:00
2fd431e971
Modify the GCC/AVR port to make use of the xTaskIncrementTick return value.
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Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
2013-06-11 20:15:15 +00:00
62c0ae0926
Update port layers to make better use of the xTaskIncrementTick() return value.
2013-06-08 18:36:25 +00:00
59a834eb86
Update ports that have their tick configuration in an application callback to use xTaskIncrementTick() in place of vTaskIncrementTick().
2013-06-07 12:39:56 +00:00
c04b074707
Convert the remaining ports to use xTaskIncrementTick() in place of vTaskIncremenTick().
2013-06-07 12:16:58 +00:00
2fc9d033c6
Update the PIC32 port to use xTaskIncrementTick() and change the macro used to detect if XC is being used.
2013-06-07 11:15:43 +00:00
51d9ee0c1c
Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to the relevant port.c file to allow the user to define functions that will execute in privileged mode.
2013-06-07 09:45:34 +00:00
f904d26957
Convert more ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
2013-06-06 16:31:15 +00:00
15ec6c87f7
Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
2013-06-06 16:06:48 +00:00
686d190798
Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
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Move DSB instructions to before WFI instructions in line with ARM recommendations.
2013-06-06 15:46:40 +00:00
06953169ba
Update RM48/TMS570 port to use xTaskIncrementTick in place of vTaskIncrementTick.
2013-06-06 13:06:24 +00:00
