dbac79045c
Formatting changes only.
2019-10-10 17:56:10 +00:00
fd118f1888
Minor formatting change in comment only.
2019-10-07 18:56:33 +00:00
eb5c60c60b
Update FreeRTOS.h with the version in GitHub. This is also to test submodule.
2019-09-24 22:29:35 +00:00
0fe36e497d
Nordic port. Notes for Richard -- the work items we discussed about for nrf52840-dk and Wiced_CY still remain. The only reason for this commit is we want to test out submodule.
2019-09-24 22:26:36 +00:00
35bc9d7938
Revert 2728. Not because the files are still needed, but because we want to test out submodule.
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Before further updating project files in GitHub, keeping an additional copy.
2019-09-24 22:19:54 +00:00
f001126ea8
Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead.
2019-09-24 20:56:55 +00:00
9052882500
Adding tickless hooks to GCC/ARM_CRx_No_GIC port.
2019-09-24 20:07:40 +00:00
80c1cb5de1
Correct code comments that referred to taskYIELD_FROM_ISR to portYIELD_FROM_ISR.
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Update RV32 port to use 16 byte-alignment all the time (only strictly necessary when using FLOP instructions).
2019-09-24 16:06:21 +00:00
c217b68d38
sync from github to svn: this version of atomic.h does not have compiler specific symbols. compiler specific optimization is to be merged in each port/<compiler>/<arch> directory.
2019-09-23 16:51:03 +00:00
6f958bbf80
sync from github to svn: Xtensa GCC as-is.
2019-09-20 22:09:21 +00:00
1c5fcc7f05
sync from github to svn: Wiced_CY for AFR Cypress ports.
2019-09-20 20:52:30 +00:00
74df636c78
sync from github to svn: documentation for RISC-V. This may be a temporary parking location.
2019-09-20 20:47:29 +00:00
cc0aee651e
sync from github to svn: Renasas/RX100 #pragma _VECT()
2019-09-20 20:41:32 +00:00
da3d370ff7
RISC-V port updates: The machine timer compare register can now be for any HART, and correct the sequence used to update the 64-bit machine timer compare register on 32-bit cores.
2019-09-04 15:46:45 +00:00
96bad0f6c3
Minor bug fix in NTPDemo.c -> use of FREERTOS_INVALID_SOCKET in place of NULL.
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Update trace recorder code to account for uxPendedTicks renaming to xPendedTicks.
2019-09-04 00:13:17 +00:00
ab41d89285
Add IAR RISC-V port to SVN - a work in progress.
2019-09-03 01:39:29 +00:00
973a4f9869
Correct alignment of stack top in RISC-V port when configISR_STACK_SIZE_WORDS is defined to a non zero value.
2019-08-27 15:57:45 +00:00
7d285f3dcb
+ Moved the History.txt file from the website git repo into the source code SVN repo.
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+ Added xTaskCatchUpTicks() which corrects the tick count value after the application code has held interrupts disabled for an extended period.
+ Updated the xTaskResumeAll() implementation so it uses the new xTaskCatchUpTicks() function mentioned above to unwind ticks that were pended while the scheduler was suspended.
+ Various maintenance on the message buffer, stream buffer and abort delay demos.
+ Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it has same type as variables it is compared to, and therefore also rename the variable xPendingTicks.
+ Correct spelling mistake within a comment that was common to all the ARMv7-M ports.
2019-08-25 19:35:59 +00:00
5352cb4f45
Tidy up Win32 port layer - include addition of new variable that prevents recursive attempts to obtain a mutex when the trace recorder is used inside an interrupt.
2019-08-04 01:14:43 +00:00
b1e35551c4
Update the FreeRTOS version number in task.h
2019-07-29 23:48:11 +00:00
6bad7d2055
Add the default definition of configPRECONDITION to FreeRTOS.h.
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This is needed for CBMC proofs.
2019-07-27 23:03:23 +00:00
fe4511b35e
Continued to work on the MQTT demo project.
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A few review comments added into the MQTT implementation.
2019-07-24 00:27:14 +00:00
8bd1813446
Only partially implemented and may get reverted - updates to the Win32 port that uses a per-task event to prevent the task proceeding past its yield point if the SuspendThread() call used to stop the task does not take effect immediately. This is intended to fix issues reported by users, although we have been unable to replicate them ourselves.
2019-07-12 01:52:22 +00:00
fa404422b9
Add link to dual core blog post into STM32H745I demo.
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Doxygen corrections in list.h.
Use #error to check FreeRTOS.h is included before message_buffer.h and stream_buffer.h.
2019-07-04 21:18:36 +00:00
246bb6e806
Add vPortGetHeapStats() function to query heap statistics.
2019-07-04 19:34:48 +00:00
7235743749
Only check once before re-setting ready priority
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The macro taskRESET_READY_PRIORITY checks if the task being removed from the
ready list is the last one and only then resets the top ready priority
by calling portRESET_READY_PRIORITY. If we already know that it is the
last ready task being removed then there is no need to perform the check
again and the macro portRESET_READY_PRIORITY can be called directly. We were
doing the unnecessary check at two places and this commit fixes them.
This commit also increases the time period of check task to ensure that all
the demo tasks get a chance to run before the check is performed.
2019-07-03 00:08:16 +00:00
fb3eaeac40
Added additional xMessageBufferSpacesAvailable() (plural) to existing xMessageBufferSpaceAvailable() (singular) macro as the documentation muddled both.
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Added #define portPOINTER_SIZE_TYPE uint64_t to the 64-bit RISC-V port layer.
2019-05-13 03:14:05 +00:00
b51529a284
Update version number ready for next release.
2019-05-11 01:47:37 +00:00
aa9c8d2697
Delete the not needed file missed in last commit
2019-05-09 22:09:12 +00:00
b9e379951a
Do not strip required symbols when LTO is on
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Link time optimization was stripping off some symbols which were
accessed from assembly code.
2019-05-09 22:04:29 +00:00
ae448fc952
Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351.
2019-05-02 21:08:28 +00:00
079d081346
Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches between 32-bit and 64-bit.
2019-04-29 00:57:14 +00:00
27ca5c8341
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM Cortex-M33 ports to assist with link time optimisation.
2019-04-25 19:49:50 +00:00
84377442fc
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM GCC ports to assist with link time optimisation.
2019-04-21 20:15:34 +00:00
606845492b
Fix potential memory leak in the Win32 FreeRTOS+TCP network interface initialisation sequence.
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Introduce portMEMORY_BARRIER() macro to assist with memory access ordering when suspending the scheduler if link time optimization is used.
2019-04-17 17:16:04 +00:00
dd9a9710c6
Export port architecture name for COrtex-M33. This can be used by debuggers to find the port in-use to be able to correctly decode the context stored on the stack.
2019-03-28 00:00:46 +00:00
ba39a958b5
Fix spelling of priority in comments.
2019-03-18 23:28:03 +00:00
12fb75be37
Fix warning portHAS_STACK_OVERFLOW_CHECKING not defined
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portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
2019-03-13 21:10:44 +00:00
2265d70499
Correcting spelling mistakes in comments only.
2019-03-08 17:30:49 +00:00
06596c3192
Prepare the RISC-V port layer for addition of 64-bit port.
2019-03-08 17:03:43 +00:00
5fe8465a35
Change type of usStackDepth to configSTACK_DEPTH_TYPE.
2019-02-21 03:25:30 +00:00
5623c69748
Fix Build and Links failure in MPU projects. Minor cosmetic changes in some V8M files.
2019-02-20 20:27:07 +00:00
8b6ab5f197
Add instructions on building the Cortex-M33 secure and non secure projects into the comments of that project and into a readme.txt file.
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Enable configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES setting to be used in statically allocated systems.
2019-02-20 17:55:59 +00:00
ceeff14524
Set default value of configRUN_FREERTOS_SECURE_ONLY to 0.
2019-02-20 00:40:46 +00:00
5849459c65
Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change spaces to tabs.
2019-02-20 00:25:45 +00:00
c3c9c12ce2
Update the common demo death.c to use the updated macro name to give it a secure context.
2019-02-19 02:57:44 +00:00
ce576f3683
First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees.
2019-02-19 02:30:32 +00:00
58ba10eee8
Update version number in readiness for V10.2.0 release.
2019-02-17 22:36:16 +00:00
55ad3861c5
Sync the Renesas port to AFR Git Repo
2019-02-17 01:27:16 +00:00
0de2a2758a
Fix definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE
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tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
2019-02-17 01:24:58 +00:00
