b1b4b15353
Add configASSERT()s to ensure counting semaphores are not created with a max count of zero or an initial count greater than the max count.
2013-11-07 16:45:30 +00:00
b181a3af99
Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
...
Remove duplicate save/restore of r14 in Cortex-M4F ports.
2013-11-07 16:43:54 +00:00
20eb03ed7d
Change behaviour when configUSE_PREEMPTION is 0 (preemption is turned off). See the change history in the next release for details.
...
Remove an erroneous const in the prototype of queue receive/peek functions.
2013-11-07 14:58:14 +00:00
30bc6c01a9
Add ehb instructions back into PIC32 port layer (upon advice).
...
Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
2013-11-07 14:16:32 +00:00
dcf261a3e6
Add xSemaphoreCreateBinary() so vSemaphoreCreate() can be deprecated.
2013-11-07 10:53:23 +00:00
dcd261bb8b
Update the Keil and IAR CM0 port layers to match the changes made to the GCC version.
2013-10-22 11:26:16 +00:00
41fe693968
Improve how the scheduler is started in the GCC Cortex-M0 port.
2013-10-22 09:50:20 +00:00
25bab250b6
Added a little intelligence to eTaskGetState() so it can distinguish between a suspended task and a task that is indefinitely blocked on an event.
2013-10-22 09:30:58 +00:00
a12ea2d212
Update FreeRTOS version number to V7.5.3
...
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
2013-10-14 19:56:47 +00:00
94607d83f9
Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer.
2013-10-14 14:03:05 +00:00
0c56f5018d
Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete.
2013-10-08 12:33:46 +00:00
aedf7824cb
Introduce the prvTaskExitError() function for all ARM_CMn ports.
...
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
2013-10-08 11:30:40 +00:00
eaacbb099a
Clear up a few compiler warnings.
...
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt. Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
2013-10-07 12:06:17 +00:00
7ec4773131
Add traceMALLOC() and traceFREE() macros.
2013-10-04 20:56:45 +00:00
1902d2b64a
Add the uxQueueSpacesAvailable() API function.
...
Move a configASSERT() call in timers.c to prevent a "condition is always true" compiler warning.
2013-09-10 13:19:12 +00:00
73606369c4
Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
...
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
2013-09-01 19:53:24 +00:00
574f5044a6
Starting point for Keil Cortex-M0 port.
2013-08-25 01:01:18 +00:00
c40370e96a
Fix a few typos and remove the "register" keyword.
2013-08-16 13:31:54 +00:00
63e8044d33
Allow compilation when portALT_GET_RUN_TIME_COUNTER_VALUE() is defined.
2013-08-14 08:35:40 +00:00
2f754d9b0c
Add additional critical section to the default tickless implementations.
...
Update version number for maintenance release.
2013-07-24 09:45:17 +00:00
3cbe0a724d
Update version number.
2013-07-23 10:51:45 +00:00
8ceb665994
Void a few unused return values and make casting more C++ friendly.
2013-07-23 09:53:24 +00:00
bb2093cf5d
Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version.
2013-07-23 09:50:06 +00:00
679a3c670c
Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library.
2013-07-23 09:44:00 +00:00
9054485f1a
Tidy up pre-processor as final act before tagging as V7.5.0
2013-07-19 10:22:47 +00:00
08057fa77f
Changes to comments only.
2013-07-19 09:16:36 +00:00
203ae64600
Rename xTaskGetSystemState() uxTaskGetSystemState().
2013-07-18 14:41:15 +00:00
92fae7d262
For consistency change the name of configINCLUDE_STATS_FORMATTING_FUNCTIONS to configUSE_STATS_FORMATTING_FUNCTIONS.
2013-07-18 11:40:32 +00:00
7d6758ee1a
Minor updates and change version number for V7.5.0 release.
2013-07-17 18:32:57 +00:00
7d1292ced2
Linting and MISRA checking
2013-07-15 14:27:15 +00:00
e83b93f5fc
Tidy up comments only.
2013-07-14 13:09:18 +00:00
ce9c3b7413
Variable name change in the PIC32 port layer only.
2013-07-14 13:06:17 +00:00
1e17924fa8
Update doxygen comments.
2013-07-13 19:58:42 +00:00
da0fff63c9
Update Cortex-M MPU version to include new API functions.
2013-07-13 19:37:35 +00:00
e5d9640863
Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined.
2013-07-13 11:31:35 +00:00
4b964814de
Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32.
2013-07-12 19:25:21 +00:00
ad8fa53043
Kernel optimisations.
2013-07-12 11:11:19 +00:00
c9d9bddc3c
Add comments to the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() calls in the core queue.c and tasks.c files.
2013-07-11 10:52:43 +00:00
5d902f2b9c
Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports.
2013-07-11 10:05:06 +00:00
65704174c9
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
...
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
2013-07-09 17:57:59 +00:00
0f6b0d3a59
Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
...
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
2013-07-09 12:49:49 +00:00
c4eef61d39
Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports.
2013-07-04 11:20:28 +00:00
b521d70e7e
Remove compiler warnings.
2013-07-02 12:39:16 +00:00
c1b4fc58d2
Add new xTaskGetSystemState() API function to return raw data on each task in the system.
...
Relegate the vTaskList() and vTaskGetRunTimeStats() functions to "sample" functions demonstrating how to use xTaskGetSystemState() to generate human readable status information.
Introduce and default configINCLUDE_STATS_FORMATTING_FUNCTIONS which must now be defined to use vTaskList() and vTaskGetRunTimeStats().
2013-07-02 12:10:16 +00:00
877ce218a4
Add additional comment only.
2013-07-01 09:05:15 +00:00
0c0b54c175
Refine the default tickless idle implementation in the Cortex-M3 port layers.
2013-06-30 10:38:31 +00:00
b8a219b30c
Update QueueOverwrite.c to include a call to xQueuePeekFromISR().
...
Default new QueuePeekFromISR() trace macros.
2013-06-28 09:21:39 +00:00
3b02b4c8f8
Add xQueueOverwriteFromISR() and update the QueueOverwrite.c to demonstrate its use.
2013-06-27 14:25:17 +00:00
671949ad78
Add xQueueOverwrite() and a common demo task to demonstrate its use.
...
Update MSVC Win32 demo to include the xQueueOverwrite() common demo tasks.
2013-06-27 09:21:43 +00:00
59f75a12f6
Add Newlib reent support.
2013-06-26 11:37:08 +00:00
