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The introduction of `portMEMORY_BARRIER` will ensure the places in the kernel use a barrier will work. For example, `xTaskResumeAll` has a memory barrier to ensure its correctness when compiled with optimization enabled. Without the barrier `xTaskResumeAll` can fail (e.g. start reading and writing to address 0 and/or infinite looping) when `xPendingReadyList` contains more than one task to restore. In `xTaskResumeAll` the compiler chooses to cache the `pxTCB` the first time through the loop for use in every subsequent loop. This is incorrect as the removal of `pxTCB->xEventListItem` will actually change the value of `pxTCB` if it was read again at the top of the loop. The barrier forces the compiler to read `pxTCB` again at the top of the loop. The compiler is operating correctly. The removal `pxTCB->xEventListItem` executes on a `List_t *` and `ListItem_t *`. This means that the compiler can assume that any `MiniListItem_t` values are unchanged by the loop (i.e. "strict-aliasing"). This allows the compiler to cache `pxTCB` as it is obtained via a `MiniListItem_t`. This is incorrect in this case because it is possible for a `ListItem_t *` to actually alias a `MiniListItem_t`. This is technically a "violation of aliasing rules" so we use the the barrier to disable the strict-aliasing optimization in this loop.
Each real time kernel port consists of three files that contain the core kernel components and are common to every port, and one or more files that are specific to a particular microcontroller and/or compiler. + The FreeRTOS/Source/Portable/MemMang directory contains the five sample memory allocators as described on the https://www.FreeRTOS.org WEB site. + The other directories each contain files specific to a particular microcontroller or compiler, where the directory name denotes the compiler specific files the directory contains. For example, if you are interested in the [compiler] port for the [architecture] microcontroller, then the port specific files are contained in FreeRTOS/Source/Portable/[compiler]/[architecture] directory. If this is the only port you are interested in then all the other directories can be ignored.