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GRE tunnel key includes the FIB table

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- GRE tunnels with the same src,dst addresses are not the same tunnel
- Two data-plane improvements:
  - the cached key was never updated and so useless
  - no need to dereference the tunnel's HW interface to get the sw_if_index

Change-Id: I2f2ea6e08c759a810b753cec22c497e921a2ca01
Signed-off-by: Neale Ranns <nranns@cisco.com>
This commit is contained in:
Neale Ranns
2017-12-14 08:51:32 -08:00
committed by Damjan Marion
parent 8e66b9bf4b
commit 33ce60d675
6 changed files with 240 additions and 139 deletions
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4
test/vpp_gre_interface.py
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@ -9,7 +9,7 @@ class VppGreInterface(VppInterface):
"""
def __init__(self, test, src_ip, dst_ip, outer_fib_id=0, is_teb=0):
""" Create VPP loopback interface """
""" Create VPP GRE interface """
self._sw_if_index = 0
super(VppGreInterface, self).__init__(test)
self._test = test
@ -42,7 +42,7 @@ class VppGre6Interface(VppInterface):
"""
def __init__(self, test, src_ip, dst_ip, outer_fib_id=0, is_teb=0):
""" Create VPP loopback interface """
""" Create VPP GRE interface """
self._sw_if_index = 0
super(VppGre6Interface, self).__init__(test)
self._test = test