mirror of
https://github.com/qmk/qmk_firmware
synced 2025-01-07 23:41:41 +00:00
Compare commits
6 Commits
Author | SHA1 | Date | |
---|---|---|---|
|
26eef35f07 | ||
|
85041ff05b | ||
|
7eab5ad60f | ||
|
ae46e6ace9 | ||
|
444fd3b1cc | ||
|
e18be69104 |
3
.gitignore
vendored
3
.gitignore
vendored
@ -70,3 +70,6 @@ id_rsa_*
|
||||
|
||||
# python things
|
||||
__pycache__
|
||||
|
||||
# prerequisites for updating ChibiOS
|
||||
/util/fmpp*
|
||||
|
1
.gitmodules
vendored
1
.gitmodules
vendored
@ -4,7 +4,6 @@
|
||||
[submodule "lib/chibios-contrib"]
|
||||
path = lib/chibios-contrib
|
||||
url = https://github.com/qmk/ChibiOS-Contrib
|
||||
branch = k-type-fix
|
||||
[submodule "lib/ugfx"]
|
||||
path = lib/ugfx
|
||||
url = https://github.com/qmk/uGFX
|
||||
|
3
.vscode/settings.json
vendored
3
.vscode/settings.json
vendored
@ -5,7 +5,8 @@
|
||||
// Configure glob patterns for excluding files and folders.
|
||||
"files.exclude": {
|
||||
"**/.build": true,
|
||||
"**/*.hex": true
|
||||
"**/*.hex": true,
|
||||
"**/*.bin": true
|
||||
},
|
||||
"files.associations": {
|
||||
"*.h": "c",
|
||||
|
6
Makefile
6
Makefile
@ -623,13 +623,19 @@ endif
|
||||
# Generate the version.h file
|
||||
ifndef SKIP_GIT
|
||||
GIT_VERSION := $(shell git describe --abbrev=6 --dirty --always --tags 2>/dev/null || date +"%Y-%m-%d-%H:%M:%S")
|
||||
CHIBIOS_VERSION := $(shell cd lib/chibios && git describe --abbrev=6 --dirty --always --tags 2>/dev/null || date +"%Y-%m-%d-%H:%M:%S")
|
||||
CHIBIOS_CONTRIB_VERSION := $(shell cd lib/chibios-contrib && git describe --abbrev=6 --dirty --always --tags 2>/dev/null || date +"%Y-%m-%d-%H:%M:%S")
|
||||
else
|
||||
GIT_VERSION := NA
|
||||
CHIBIOS_VERSION := NA
|
||||
CHIBIOS_CONTRIB_VERSION := NA
|
||||
endif
|
||||
ifndef SKIP_VERSION
|
||||
BUILD_DATE := $(shell date +"%Y-%m-%d-%H:%M:%S")
|
||||
$(shell echo '#define QMK_VERSION "$(GIT_VERSION)"' > $(ROOT_DIR)/quantum/version.h)
|
||||
$(shell echo '#define QMK_BUILDDATE "$(BUILD_DATE)"' >> $(ROOT_DIR)/quantum/version.h)
|
||||
$(shell echo '#define CHIBIOS_VERSION "$(CHIBIOS_VERSION)"' >> $(ROOT_DIR)/quantum/version.h)
|
||||
$(shell echo '#define CHIBIOS_CONTRIB_VERSION "$(CHIBIOS_CONTRIB_VERSION)"' >> $(ROOT_DIR)/quantum/version.h)
|
||||
else
|
||||
BUILD_DATE := NA
|
||||
endif
|
||||
|
@ -298,6 +298,7 @@ VALID_BACKLIGHT_TYPES := pwm software custom
|
||||
BACKLIGHT_ENABLE ?= no
|
||||
BACKLIGHT_DRIVER ?= pwm
|
||||
ifeq ($(strip $(BACKLIGHT_ENABLE)), yes)
|
||||
SRC += $(QUANTUM_DIR)/process_keycode/process_backlight.c
|
||||
ifeq ($(filter $(BACKLIGHT_DRIVER),$(VALID_BACKLIGHT_TYPES)),)
|
||||
$(error BACKLIGHT_DRIVER="$(BACKLIGHT_DRIVER)" is not a valid backlight type)
|
||||
endif
|
||||
|
75
docs/ChangeLog/20200229.md
Normal file
75
docs/ChangeLog/20200229.md
Normal file
@ -0,0 +1,75 @@
|
||||
# QMK Breaking Change - 2020 Feb 29 Changelog
|
||||
|
||||
Four times a year QMK runs a process for merging Breaking Changes. A Breaking Change is any change which modifies how QMK behaves in a way that is incompatible or potentially dangerous. We limit these changes to 4 times per year so that users can have confidence that updating their QMK tree will not break their keymaps.
|
||||
|
||||
|
||||
## Update ChibiOS/ChibiOS-Contrib/uGFX submodules
|
||||
|
||||
* General Notes
|
||||
* A `make git-submodule` may be required after pulling the latest QMK firmware code to update affected submodules to the upgraded revisions
|
||||
* Enabling link-time-optimization (`LINK_TIME_OPTIMIZATION_ENABLE = yes`) should work on a lot more boards
|
||||
* Upgrade to ChibiOS ver19.1.3
|
||||
* This will allow QMK to update to upstream ChibiOS a lot easier -- the old version was ~2 years out of date. Automated update scripts have been made available to simplify future upgrades.
|
||||
* Includes improved MCU support and bugfixes
|
||||
* ChibiOS revision is now included in Command output
|
||||
* Timers should now be more accurate
|
||||
* Upgrade to newer ChibiOS-Contrib
|
||||
* Also includes improved MCU support and bugfixes
|
||||
* ChibiOS-Contrib revision is now included in Command output
|
||||
* Upgrade to newer uGFX
|
||||
* Required in order to support updated ChibiOS
|
||||
|
||||
|
||||
## Fix ChibiOS timer overflow for 16-bit SysTick devices
|
||||
|
||||
* On 16-bit SysTick devices, the timer subsystem in QMK was incorrectly dealing with overflow.
|
||||
* When running at a 100000 SysTick frequency (possible on 16-bit devices, but uncommon), this overflow would occur after 0.65 seconds.
|
||||
* Timers are now correctly handling this overflow case and timing should now be correct on ChibiOS/ARM.
|
||||
|
||||
|
||||
## Update LUFA submodule
|
||||
|
||||
* Updates the LUFA submodule to include updates from upstream (abcminiuser/lufa)
|
||||
* Includes some cleanup for QMK DFU generation
|
||||
|
||||
|
||||
## Encoder flip
|
||||
|
||||
* Flips the encoder direction so that `clockwise == true` is for actually turning the knob clockwise
|
||||
* Adds `ENCODER_DIRECTION_FLIP` define, so that reversing the expected dirction is simple for users.
|
||||
* Cleans up documentation page for encoders
|
||||
|
||||
|
||||
## Adding support for `BACKLIGHT_ON_STATE` for hardware PWM backlight
|
||||
|
||||
* Previously, the define only affected software PWM, and hardware PWM always assumed an N-channel MOSFET.
|
||||
* The hardware PWM backlight setup has been updated to respect this option.
|
||||
* The default "on" state has been changed to `1` - **this impacts all keyboards using software PWM backlight that do not define it explicitly**. If your keyboard's backlight is acting strange, it may have a P-channel MOSFET, and will need to have `#define BACKLIGHT_ON_STATE 0` added to the keyboard-level `config.h`. Please see the PR for more detailed information.
|
||||
|
||||
|
||||
## Migrating `ACTION_LAYER_TAP_KEY()` entries in `fn_actions` to `LT()` keycodes
|
||||
|
||||
* `fn_actions` is deprecated, and its functionality has been superseded by direct keycodes and `process_record_user()`
|
||||
* The end result of removing this obsolete feature should result in a decent reduction in firmware size and code complexity
|
||||
* All keymaps affected are recommended to switch away from `fn_actions` in favour of the [custom keycode](https://docs.qmk.fm/#/custom_quantum_functions) and [macro](https://docs.qmk.fm/#/feature_macros) features
|
||||
|
||||
|
||||
## Moving backlight keycode handling to `process_keycode/`
|
||||
|
||||
* This refactors the backlight keycode logic to be clearer and more modular.
|
||||
* All backlight-related keycodes are now actioned in a single file.
|
||||
* The `ACTION_BACKLIGHT_*` macros have also been deleted. If you are still using these in a `fn_actions[]` block, please switch to using the backlight keycodes or functions directly.
|
||||
|
||||
|
||||
## Refactor Planck keymaps to use Layout Macros
|
||||
|
||||
* Refactor Planck keymaps to use layout macros instead of raw matrix assignments
|
||||
* Makes keymaps revision-agnostic
|
||||
* Should reduce noise and errors in Travis CI logs
|
||||
|
||||
|
||||
## GON NerD codebase refactor
|
||||
|
||||
* Splits the codebase for GON NerD 60 and NerdD TKL PCBs into two separate directories.
|
||||
* If your keymap is for a NerD 60 PCB, your `make` command is now `make gon/nerd60:<keymap>`.
|
||||
* If your keymap is for a NerD TKL PCB, your `make` command is now `make gon/nerdtkl:<keymap>`.
|
@ -17,8 +17,8 @@ The next Breaking Change is scheduled for February 29, 2020.
|
||||
* [x] 2019 Sep 21 - `future` is created. It will be rebased weekly.
|
||||
* [x] 2020 Feb 1 - `future` closed to new PR's.
|
||||
* [x] 2020 Feb 1 - Call for testers.
|
||||
* [ ] 2020 Feb 26 - `master` is locked, no PR's merged.
|
||||
* [ ] 2020 Feb 28 - Merge `future` to `master`.
|
||||
* [x] 2020 Feb 27 - `master` is locked, no PR's merged.
|
||||
* [ ] 2020 Feb 29 - Merge `future` to `master`.
|
||||
* [ ] 2020 Feb 29 - `master` is unlocked. PR's can be merged again.
|
||||
|
||||
## What changes will be included?
|
||||
|
@ -119,10 +119,22 @@ When both timers are in use for Audio, the backlight PWM will not use a hardware
|
||||
|
||||
To change the behavior of the backlighting, `#define` these in your `config.h`:
|
||||
|
||||
|Define |Default |Description |
|
||||
|---------------------|-------------|--------------------------------------------------------------------------------------------------------------|
|
||||
|`BACKLIGHT_PIN` |`B7` |The pin that controls the LEDs. Unless you are designing your own keyboard, you shouldn't need to change this |
|
||||
|`BACKLIGHT_PINS` |*Not defined*|experimental: see below for more information |
|
||||
|Define |Default |Description |
|
||||
|---------------------|-------------|-------------------------------------------------------------------------------------------------------------|
|
||||
|`BACKLIGHT_PIN` |`B7` |The pin that controls the LEDs. Unless you are designing your own keyboard, you shouldn't need to change this|
|
||||
|`BACKLIGHT_PINS` |*Not defined*|experimental: see below for more information |
|
||||
|`BACKLIGHT_LEVELS` |`3` |The number of brightness levels (maximum 31 excluding off) |
|
||||
|`BACKLIGHT_CAPS_LOCK`|*Not defined*|Enable Caps Lock indicator using backlight (for keyboards without dedicated LED) |
|
||||
|`BACKLIGHT_BREATHING`|*Not defined*|Enable backlight breathing, if supported |
|
||||
|`BREATHING_PERIOD` |`6` |The length of one backlight "breath" in seconds |
|
||||
|`BACKLIGHT_ON_STATE` |`1` |The state of the backlight pin when the backlight is "on" - `1` for high, `0` for low |
|
||||
|
||||
### Backlight On State
|
||||
|
||||
Most backlight circuits are driven by an N-channel MOSFET or NPN transistor. This means that to turn the transistor *on* and light the LEDs, you must drive the backlight pin, connected to the gate or base, *high*.
|
||||
Sometimes, however, a P-channel MOSFET, or a PNP transistor is used. In this case, when the transistor is on, the pin is driven *low* instead.
|
||||
|
||||
This functionality is configured at the keyboard level with the `BACKLIGHT_ON_STATE` define.
|
||||
|
||||
### Multiple backlight pins
|
||||
|
||||
|
@ -2,23 +2,35 @@
|
||||
|
||||
Basic encoders are supported by adding this to your `rules.mk`:
|
||||
|
||||
ENCODER_ENABLE = yes
|
||||
```make
|
||||
ENCODER_ENABLE = yes
|
||||
```
|
||||
|
||||
and this to your `config.h`:
|
||||
|
||||
#define ENCODERS_PAD_A { B12 }
|
||||
#define ENCODERS_PAD_B { B13 }
|
||||
```c
|
||||
#define ENCODERS_PAD_A { B12 }
|
||||
#define ENCODERS_PAD_B { B13 }
|
||||
```
|
||||
|
||||
Each PAD_A/B variable defines an array so multiple encoders can be defined, e.g.:
|
||||
|
||||
#define ENCODERS_PAD_A { encoder1a, encoder2a }
|
||||
#define ENCODERS_PAD_B { encoder1b, encoder2b }
|
||||
```c
|
||||
#define ENCODERS_PAD_A { encoder1a, encoder2a }
|
||||
#define ENCODERS_PAD_B { encoder1b, encoder2b }
|
||||
```
|
||||
|
||||
If your encoder's clockwise directions are incorrect, you can swap the A & B pad definitions.
|
||||
If your encoder's clockwise directions are incorrect, you can swap the A & B pad definitions. They can also be flipped with a define:
|
||||
|
||||
```c
|
||||
#define ENCODER_DIRECTION_FLIP
|
||||
```
|
||||
|
||||
Additionally, the resolution can be specified in the same file (the default & suggested is 4):
|
||||
|
||||
#define ENCODER_RESOLUTION 4
|
||||
```c
|
||||
#define ENCODER_RESOLUTION 4
|
||||
```
|
||||
|
||||
## Split Keyboards
|
||||
|
||||
@ -33,27 +45,31 @@ If you are using different pinouts for the encoders on each half of a split keyb
|
||||
|
||||
The callback functions can be inserted into your `<keyboard>.c`:
|
||||
|
||||
void encoder_update_kb(uint8_t index, bool clockwise) {
|
||||
encoder_update_user(index, clockwise);
|
||||
}
|
||||
```c
|
||||
void encoder_update_kb(uint8_t index, bool clockwise) {
|
||||
encoder_update_user(index, clockwise);
|
||||
}
|
||||
```
|
||||
|
||||
or `keymap.c`:
|
||||
|
||||
void encoder_update_user(uint8_t index, bool clockwise) {
|
||||
if (index == 0) { /* First encoder */
|
||||
```c
|
||||
void encoder_update_user(uint8_t index, bool clockwise) {
|
||||
if (index == 0) { /* First encoder */
|
||||
if (clockwise) {
|
||||
tap_code(KC_PGDN);
|
||||
tap_code(KC_PGDN);
|
||||
} else {
|
||||
tap_code(KC_PGUP);
|
||||
tap_code(KC_PGUP);
|
||||
}
|
||||
} else if (index == 1) { /* Second encoder */
|
||||
} else if (index == 1) { /* Second encoder */
|
||||
if (clockwise) {
|
||||
tap_code(KC_UP);
|
||||
tap_code(KC_DOWN);
|
||||
} else {
|
||||
tap_code(KC_DOWN);
|
||||
tap_code(KC_UP);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
## Hardware
|
||||
|
||||
|
@ -107,6 +107,16 @@ Would tap `KC_HOME` - note how the prefix is now `X_`, and not `KC_`. You can al
|
||||
|
||||
Which would send "VE" followed by a `KC_HOME` tap, and "LO" (spelling "LOVE" if on a newline).
|
||||
|
||||
Delays can be also added to the string:
|
||||
|
||||
* `SS_DELAY(msecs)` will delay for the specified number of milliseconds.
|
||||
|
||||
For example:
|
||||
|
||||
SEND_STRING("VE" SS_DELAY(1000) SS_TAP(X_HOME) "LO");
|
||||
|
||||
Which would send "VE" followed by a 1-second delay, then a `KC_HOME` tap, and "LO" (spelling "LOVE" if on a newline, but delayed in the middle).
|
||||
|
||||
There's also a couple of mod shortcuts you can use:
|
||||
|
||||
* `SS_LCTL(string)`
|
||||
@ -200,11 +210,11 @@ This will clear all mods currently pressed.
|
||||
|
||||
This will clear all keys besides the mods currently pressed.
|
||||
|
||||
## Advanced Example:
|
||||
## Advanced Example:
|
||||
|
||||
### Super ALT↯TAB
|
||||
|
||||
This macro will register `KC_LALT` and tap `KC_TAB`, then wait for 1000ms. If the key is tapped again, it will send another `KC_TAB`; if there is no tap, `KC_LALT` will be unregistered, thus allowing you to cycle through windows.
|
||||
This macro will register `KC_LALT` and tap `KC_TAB`, then wait for 1000ms. If the key is tapped again, it will send another `KC_TAB`; if there is no tap, `KC_LALT` will be unregistered, thus allowing you to cycle through windows.
|
||||
|
||||
```c
|
||||
bool is_alt_tab_active = false; # ADD this near the begining of keymap.c
|
||||
@ -221,7 +231,7 @@ bool process_record_user(uint16_t keycode, keyrecord_t *record) {
|
||||
if (!is_alt_tab_active) {
|
||||
is_alt_tab_active = true;
|
||||
register_code(KC_LALT);
|
||||
}
|
||||
}
|
||||
alt_tab_timer = timer_read();
|
||||
register_code(KC_TAB);
|
||||
} else {
|
||||
@ -232,7 +242,7 @@ bool process_record_user(uint16_t keycode, keyrecord_t *record) {
|
||||
return true;
|
||||
}
|
||||
|
||||
void matrix_scan_user(void) { # The very important timer.
|
||||
void matrix_scan_user(void) { # The very important timer.
|
||||
if (is_alt_tab_active) {
|
||||
if (timer_elapsed(alt_tab_timer) > 1000) {
|
||||
unregister_code(KC_LALT);
|
||||
@ -321,7 +331,7 @@ const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
```
|
||||
|
||||
|
||||
## Advanced Example:
|
||||
## Advanced Example:
|
||||
|
||||
### Single-Key Copy/Paste
|
||||
|
||||
|
@ -79,14 +79,14 @@ i2c_status_t i2c_start(uint8_t address) {
|
||||
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
|
||||
i2c_address = address;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout));
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
|
||||
i2c_address = address;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout));
|
||||
msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
@ -100,14 +100,14 @@ i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data,
|
||||
}
|
||||
complete_packet[0] = regaddr;
|
||||
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout));
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
|
||||
i2c_address = devaddr;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, MS2ST(timeout));
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
|
@ -60,7 +60,7 @@ void ws2812_init(void) {
|
||||
|
||||
// TODO: more dynamic baudrate
|
||||
static const SPIConfig spicfg = {
|
||||
NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN),
|
||||
0, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN),
|
||||
SPI_CR1_BR_1 | SPI_CR1_BR_0 // baudrate : fpclk / 8 => 1tick is 0.32us (2.25 MHz)
|
||||
};
|
||||
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
@ -20,56 +20,209 @@
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
#include "stm32_gpio.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
* @brief Type of STM32 GPIO port setup.
|
||||
*/
|
||||
const PALConfig pal_default_config = {
|
||||
# if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOB
|
||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOC
|
||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOD
|
||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOE
|
||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOF
|
||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOG
|
||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOH
|
||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||
# endif
|
||||
};
|
||||
typedef struct {
|
||||
uint32_t moder;
|
||||
uint32_t otyper;
|
||||
uint32_t ospeedr;
|
||||
uint32_t pupdr;
|
||||
uint32_t odr;
|
||||
uint32_t afrl;
|
||||
uint32_t afrh;
|
||||
} gpio_setup_t;
|
||||
|
||||
/**
|
||||
* @brief Type of STM32 GPIO initialization data.
|
||||
*/
|
||||
typedef struct {
|
||||
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
|
||||
gpio_setup_t PAData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
|
||||
gpio_setup_t PBData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
|
||||
gpio_setup_t PCData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
|
||||
gpio_setup_t PDData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
|
||||
gpio_setup_t PEData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
|
||||
gpio_setup_t PFData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
|
||||
gpio_setup_t PGData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
|
||||
gpio_setup_t PHData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
|
||||
gpio_setup_t PIData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
|
||||
gpio_setup_t PJData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
|
||||
gpio_setup_t PKData;
|
||||
#endif
|
||||
} gpio_config_t;
|
||||
|
||||
/**
|
||||
* @brief STM32 GPIO static initialization data.
|
||||
*/
|
||||
static const gpio_config_t gpio_default_config = {
|
||||
#if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
|
||||
#endif
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
|
||||
gpiop->OTYPER = config->otyper;
|
||||
gpiop->OSPEEDR = config->ospeedr;
|
||||
gpiop->PUPDR = config->pupdr;
|
||||
gpiop->ODR = config->odr;
|
||||
gpiop->AFRL = config->afrl;
|
||||
gpiop->AFRH = config->afrh;
|
||||
gpiop->MODER = config->moder;
|
||||
}
|
||||
|
||||
static void stm32_gpio_init(void) {
|
||||
/* Enabling GPIO-related clocks, the mask comes from the
|
||||
registry header file.*/
|
||||
rccResetAHB(STM32_GPIO_EN_MASK);
|
||||
rccEnableAHB(STM32_GPIO_EN_MASK, true);
|
||||
|
||||
/* Initializing all the defined GPIO ports.*/
|
||||
#if STM32_HAS_GPIOA
|
||||
gpio_init(GPIOA, &gpio_default_config.PAData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
gpio_init(GPIOB, &gpio_default_config.PBData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
gpio_init(GPIOC, &gpio_default_config.PCData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
gpio_init(GPIOD, &gpio_default_config.PDData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
gpio_init(GPIOE, &gpio_default_config.PEData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
gpio_init(GPIOF, &gpio_default_config.PFData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
gpio_init(GPIOG, &gpio_default_config.PGData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
gpio_init(GPIOH, &gpio_default_config.PHData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
gpio_init(GPIOI, &gpio_default_config.PIData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
gpio_init(GPIOJ, &gpio_default_config.PJData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
gpio_init(GPIOK, &gpio_default_config.PKData);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
* @details GPIO ports and system clocks are initialized before everything
|
||||
* else.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
enter_bootloader_mode_if_requested();
|
||||
|
||||
stm32_gpio_init();
|
||||
stm32_clock_init();
|
||||
}
|
||||
|
||||
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief SDC card detection.
|
||||
*/
|
||||
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDC card write protection detection.
|
||||
*/
|
||||
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return false;
|
||||
}
|
||||
#endif /* HAL_USE_SDC */
|
||||
|
||||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief MMC_SPI card detection.
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
@ -22,6 +22,10 @@
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*
|
||||
* Setup for Generic STM32_F072 Board
|
||||
*/
|
||||
@ -167,11 +171,9 @@
|
||||
#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
|
||||
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
|
||||
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
|
||||
|
||||
#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
|
||||
#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
|
||||
#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
|
||||
|
||||
#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U)
|
||||
#define LINE_LED_RED PAL_LINE(GPIOC, 6U)
|
||||
#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U)
|
||||
@ -179,10 +181,25 @@
|
||||
#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U)
|
||||
#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
|
||||
#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
|
||||
|
||||
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
|
||||
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*
|
||||
* I/O ports initial setup, this configuration is established soon after reset
|
||||
* in the initialization code.
|
||||
@ -373,6 +390,10 @@
|
||||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U))
|
||||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U))
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
# ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -3,3 +3,7 @@ BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB
|
||||
|
||||
# Shared variables
|
||||
ALLCSRC += $(BOARDSRC)
|
||||
ALLINC += $(BOARDINC)
|
||||
|
@ -6,7 +6,7 @@
|
||||
<configuration_settings>
|
||||
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
|
||||
<output_path>..</output_path>
|
||||
<hal_version>3.0.x</hal_version>
|
||||
<hal_version>5.0.x</hal_version>
|
||||
</configuration_settings>
|
||||
<board_name>ST STM32F072B-Discovery</board_name>
|
||||
<board_id>ST_STM32F072B_DISCOVERY</board_id>
|
||||
|
15
drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp
Normal file
15
drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp
Normal file
@ -0,0 +1,15 @@
|
||||
sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates
|
||||
outputRoot: ..
|
||||
dataRoot: .
|
||||
|
||||
freemarkerLinks: {
|
||||
lib: ../../../../../tools/ftl/libs
|
||||
}
|
||||
|
||||
data : {
|
||||
doc1:xml (
|
||||
board.chcfg
|
||||
{
|
||||
}
|
||||
)
|
||||
}
|
@ -14,44 +14,172 @@
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
/*
|
||||
* This file has been automatically generated using ChibiStudio board
|
||||
* generator plugin. Do not edit manually.
|
||||
*/
|
||||
const PALConfig pal_default_config = {
|
||||
# if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOB
|
||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOC
|
||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOD
|
||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOE
|
||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOF
|
||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOG
|
||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOH
|
||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||
# endif
|
||||
# if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||
# endif
|
||||
};
|
||||
|
||||
#include "hal.h"
|
||||
#include "stm32_gpio.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type of STM32 GPIO port setup.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t moder;
|
||||
uint32_t otyper;
|
||||
uint32_t ospeedr;
|
||||
uint32_t pupdr;
|
||||
uint32_t odr;
|
||||
uint32_t afrl;
|
||||
uint32_t afrh;
|
||||
} gpio_setup_t;
|
||||
|
||||
/**
|
||||
* @brief Type of STM32 GPIO initialization data.
|
||||
*/
|
||||
typedef struct {
|
||||
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
|
||||
gpio_setup_t PAData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
|
||||
gpio_setup_t PBData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
|
||||
gpio_setup_t PCData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
|
||||
gpio_setup_t PDData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
|
||||
gpio_setup_t PEData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
|
||||
gpio_setup_t PFData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
|
||||
gpio_setup_t PGData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
|
||||
gpio_setup_t PHData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
|
||||
gpio_setup_t PIData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
|
||||
gpio_setup_t PJData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
|
||||
gpio_setup_t PKData;
|
||||
#endif
|
||||
} gpio_config_t;
|
||||
|
||||
/**
|
||||
* @brief STM32 GPIO static initialization data.
|
||||
*/
|
||||
static const gpio_config_t gpio_default_config = {
|
||||
#if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
|
||||
#endif
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
|
||||
gpiop->OTYPER = config->otyper;
|
||||
gpiop->OSPEEDR = config->ospeedr;
|
||||
gpiop->PUPDR = config->pupdr;
|
||||
gpiop->ODR = config->odr;
|
||||
gpiop->AFRL = config->afrl;
|
||||
gpiop->AFRH = config->afrh;
|
||||
gpiop->MODER = config->moder;
|
||||
}
|
||||
|
||||
static void stm32_gpio_init(void) {
|
||||
/* Enabling GPIO-related clocks, the mask comes from the
|
||||
registry header file.*/
|
||||
rccResetAHB(STM32_GPIO_EN_MASK);
|
||||
rccEnableAHB(STM32_GPIO_EN_MASK, true);
|
||||
|
||||
/* Initializing all the defined GPIO ports.*/
|
||||
#if STM32_HAS_GPIOA
|
||||
gpio_init(GPIOA, &gpio_default_config.PAData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
gpio_init(GPIOB, &gpio_default_config.PBData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
gpio_init(GPIOC, &gpio_default_config.PCData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
gpio_init(GPIOD, &gpio_default_config.PDData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
gpio_init(GPIOE, &gpio_default_config.PEData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
gpio_init(GPIOF, &gpio_default_config.PFData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
gpio_init(GPIOG, &gpio_default_config.PGData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
gpio_init(GPIOH, &gpio_default_config.PHData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
gpio_init(GPIOI, &gpio_default_config.PIData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
gpio_init(GPIOJ, &gpio_default_config.PJData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
gpio_init(GPIOK, &gpio_default_config.PKData);
|
||||
#endif
|
||||
}
|
||||
|
||||
void enter_bootloader_mode_if_requested(void);
|
||||
|
||||
@ -62,6 +190,8 @@ void enter_bootloader_mode_if_requested(void);
|
||||
*/
|
||||
void __early_init(void) {
|
||||
enter_bootloader_mode_if_requested();
|
||||
|
||||
stm32_gpio_init();
|
||||
stm32_clock_init();
|
||||
}
|
||||
|
||||
|
@ -24,10 +24,10 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
/* Driver hardware support. */
|
||||
/*===========================================================================*/
|
||||
|
||||
# define GDISP_HARDWARE_FLUSH TRUE // This controller requires flushing
|
||||
# define GDISP_HARDWARE_DRAWPIXEL TRUE
|
||||
# define GDISP_HARDWARE_PIXELREAD TRUE
|
||||
# define GDISP_HARDWARE_CONTROL TRUE
|
||||
# define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
|
||||
# define GDISP_HARDWARE_DRAWPIXEL GFXON
|
||||
# define GDISP_HARDWARE_PIXELREAD GFXON
|
||||
# define GDISP_HARDWARE_CONTROL GFXON
|
||||
|
||||
# define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_GRAY256
|
||||
|
||||
|
@ -14,11 +14,11 @@
|
||||
/* Driver hardware support. */
|
||||
/*===========================================================================*/
|
||||
|
||||
# define GDISP_HARDWARE_FLUSH TRUE // This controller requires flushing
|
||||
# define GDISP_HARDWARE_DRAWPIXEL TRUE
|
||||
# define GDISP_HARDWARE_PIXELREAD TRUE
|
||||
# define GDISP_HARDWARE_CONTROL TRUE
|
||||
# define GDISP_HARDWARE_BITFILLS TRUE
|
||||
# define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
|
||||
# define GDISP_HARDWARE_DRAWPIXEL GFXON
|
||||
# define GDISP_HARDWARE_PIXELREAD GFXON
|
||||
# define GDISP_HARDWARE_CONTROL GFXON
|
||||
# define GDISP_HARDWARE_BITFILLS GFXON
|
||||
|
||||
# define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -74,7 +74,7 @@ const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
HPR_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_BSPC, \
|
||||
CTL_ESC, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, \
|
||||
SFT_BSP, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, SFT_ENT, \
|
||||
KC_LCTL, MEH_GRV, KC_LALT, KC_LGUI, F(0), RAISE, KC_RGUI, KC_RALT, KC_RCTL \
|
||||
KC_LCTL, MEH_GRV, KC_LALT, KC_LGUI, LT(_LOWER, KC_SPC), RAISE, KC_RGUI, KC_RALT, KC_RCTL \
|
||||
),
|
||||
|
||||
/* Colemak
|
||||
@ -92,7 +92,7 @@ const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
HPR_TAB, KC_Q, KC_W, KC_F, KC_P, KC_G, KC_J, KC_L, KC_U, KC_Y, KC_SCLN, KC_BSPC, \
|
||||
CTL_ESC, KC_A, KC_R, KC_S, KC_T, KC_D, KC_H, KC_N, KC_E, KC_I, KC_O, KC_QUOT, \
|
||||
SFT_BSP, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_K, KC_M, KC_COMM, KC_DOT, KC_SLSH, SFT_ENT, \
|
||||
KC_LCTL, MEH_GRV, KC_LALT, KC_LGUI, F(0), RAISE, KC_RGUI, KC_RALT, KC_RCTL \
|
||||
KC_LCTL, MEH_GRV, KC_LALT, KC_LGUI, LT(_LOWER, KC_SPC), RAISE, KC_RGUI, KC_RALT, KC_RCTL \
|
||||
),
|
||||
|
||||
/* Dvorak
|
||||
@ -110,7 +110,7 @@ const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
HPR_TAB, KC_QUOT, KC_COMM, KC_DOT, KC_P, KC_Y, KC_F, KC_G, KC_C, KC_R, KC_L, KC_BSPC, \
|
||||
CTL_ESC, KC_A, KC_O, KC_E, KC_U, KC_I, KC_D, KC_H, KC_T, KC_N, KC_S, KC_SLSH, \
|
||||
SFT_BSP, KC_SCLN, KC_Q, KC_J, KC_K, KC_X, KC_B, KC_M, KC_W, KC_V, KC_Z, SFT_ENT, \
|
||||
KC_LCTL, MEH_GRV, KC_LALT, KC_LGUI, F(0), RAISE, KC_RGUI, KC_RALT, KC_RCTL \
|
||||
KC_LCTL, MEH_GRV, KC_LALT, KC_LGUI, LT(_LOWER, KC_SPC), RAISE, KC_RGUI, KC_RALT, KC_RCTL \
|
||||
),
|
||||
|
||||
/* Lower
|
||||
@ -168,10 +168,6 @@ const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
)
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM fn_actions[] = {
|
||||
[0] = ACTION_LAYER_TAP_KEY(_LOWER, KC_SPC),
|
||||
};
|
||||
|
||||
bool process_record_user(uint16_t keycode, keyrecord_t *record) {
|
||||
switch (keycode) {
|
||||
case QWERTY:
|
||||
|
@ -13,7 +13,9 @@
|
||||
#define _RAISE 2
|
||||
#define _ADJUST 3
|
||||
|
||||
|
||||
#define LOW_SPC LT(_LOWER, KC_SPC)
|
||||
#define RSE_SPC LT(_RAISE, KC_SPC)
|
||||
#define ADJ_TAB LT(ADJUST, KC_TAB)
|
||||
|
||||
enum custom_keycodes {
|
||||
QWERTY = SAFE_RANGE,
|
||||
@ -26,9 +28,9 @@ const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
|
||||
[_QWERTY] = LAYOUT( \
|
||||
KC_ESC, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_BSPC,\
|
||||
F(2), KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_ENT, \
|
||||
ADJ_TAB, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_ENT, \
|
||||
KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, \
|
||||
KC_LCTL, KC_LGUI,KC_LALT, F(0), F(1), KC_RGUI,KC_RALT, KC_RCTL \
|
||||
KC_LCTL, KC_LGUI,KC_LALT, LOW_SPC, RSE_SPC, KC_RGUI,KC_RALT, KC_RCTL \
|
||||
),
|
||||
|
||||
[_LOWER] = LAYOUT( \
|
||||
@ -54,25 +56,6 @@ const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
|
||||
};
|
||||
|
||||
enum function_id {
|
||||
LAUNCH,
|
||||
RGBLED_TOGGLE,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM fn_actions[] = {
|
||||
[0] = ACTION_LAYER_TAP_KEY(_LOWER, KC_SPC),
|
||||
[1] = ACTION_LAYER_TAP_KEY(_RAISE, KC_SPC),
|
||||
[2] = ACTION_LAYER_TAP_KEY(_ADJUST,KC_TAB),
|
||||
|
||||
};
|
||||
|
||||
const macro_t *action_get_macro(keyrecord_t *record, uint8_t id, uint8_t opt)
|
||||
{
|
||||
// MACRODOWN only works in this function
|
||||
|
||||
return MACRO_NONE;
|
||||
};
|
||||
|
||||
bool process_record_user(uint16_t keycode, keyrecord_t *record) {
|
||||
|
||||
switch (keycode) {
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
@ -20,14 +20,76 @@
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
#include "stm32_gpio.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
* @brief Type of STM32 GPIO port setup.
|
||||
*/
|
||||
const PALConfig pal_default_config = {
|
||||
typedef struct {
|
||||
uint32_t moder;
|
||||
uint32_t otyper;
|
||||
uint32_t ospeedr;
|
||||
uint32_t pupdr;
|
||||
uint32_t odr;
|
||||
uint32_t afrl;
|
||||
uint32_t afrh;
|
||||
} gpio_setup_t;
|
||||
|
||||
/**
|
||||
* @brief Type of STM32 GPIO initialization data.
|
||||
*/
|
||||
typedef struct {
|
||||
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
|
||||
gpio_setup_t PAData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
|
||||
gpio_setup_t PBData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
|
||||
gpio_setup_t PCData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
|
||||
gpio_setup_t PDData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
|
||||
gpio_setup_t PEData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
|
||||
gpio_setup_t PFData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
|
||||
gpio_setup_t PGData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
|
||||
gpio_setup_t PHData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
|
||||
gpio_setup_t PIData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
|
||||
gpio_setup_t PJData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
|
||||
gpio_setup_t PKData;
|
||||
#endif
|
||||
} gpio_config_t;
|
||||
|
||||
/**
|
||||
* @brief STM32 GPIO static initialization data.
|
||||
*/
|
||||
static const gpio_config_t gpio_default_config = {
|
||||
#if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
||||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
@ -62,23 +124,118 @@ const PALConfig pal_default_config = {
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
|
||||
VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
|
||||
VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
void enter_bootloader_mode_if_requested(void);
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
|
||||
|
||||
gpiop->OTYPER = config->otyper;
|
||||
gpiop->OSPEEDR = config->ospeedr;
|
||||
gpiop->PUPDR = config->pupdr;
|
||||
gpiop->ODR = config->odr;
|
||||
gpiop->AFRL = config->afrl;
|
||||
gpiop->AFRH = config->afrh;
|
||||
gpiop->MODER = config->moder;
|
||||
}
|
||||
|
||||
static void stm32_gpio_init(void) {
|
||||
|
||||
/* Enabling GPIO-related clocks, the mask comes from the
|
||||
registry header file.*/
|
||||
rccResetAHB(STM32_GPIO_EN_MASK);
|
||||
rccEnableAHB(STM32_GPIO_EN_MASK, true);
|
||||
|
||||
/* Initializing all the defined GPIO ports.*/
|
||||
#if STM32_HAS_GPIOA
|
||||
gpio_init(GPIOA, &gpio_default_config.PAData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
gpio_init(GPIOB, &gpio_default_config.PBData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
gpio_init(GPIOC, &gpio_default_config.PCData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
gpio_init(GPIOD, &gpio_default_config.PDData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
gpio_init(GPIOE, &gpio_default_config.PEData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
gpio_init(GPIOF, &gpio_default_config.PFData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
gpio_init(GPIOG, &gpio_default_config.PGData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
gpio_init(GPIOH, &gpio_default_config.PHData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
gpio_init(GPIOI, &gpio_default_config.PIData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
gpio_init(GPIOJ, &gpio_default_config.PJData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
gpio_init(GPIOK, &gpio_default_config.PKData);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
* @details GPIO ports and system clocks are initialized before everything
|
||||
* else.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
extern void enter_bootloader_mode_if_requested(void);
|
||||
enter_bootloader_mode_if_requested();
|
||||
stm32_gpio_init();
|
||||
stm32_clock_init();
|
||||
}
|
||||
|
||||
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief SDC card detection.
|
||||
*/
|
||||
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||||
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDC card write protection detection.
|
||||
*/
|
||||
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||||
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return false;
|
||||
}
|
||||
#endif /* HAL_USE_SDC */
|
||||
|
||||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief MMC_SPI card detection.
|
||||
@ -106,4 +263,6 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
SYSCFG->CFGR1 |= SYSCFG_CFGR1_I2C1_DMA_RMP;
|
||||
SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_SPI2_DMA_RMP);
|
||||
}
|
||||
|
@ -22,6 +22,10 @@
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*
|
||||
* Setup for ST STM32F072B-Discovery board.
|
||||
*/
|
||||
@ -166,11 +170,9 @@
|
||||
#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
|
||||
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
|
||||
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
|
||||
|
||||
#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
|
||||
#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
|
||||
#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
|
||||
|
||||
#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U)
|
||||
#define LINE_LED_RED PAL_LINE(GPIOC, 6U)
|
||||
#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U)
|
||||
@ -178,12 +180,25 @@
|
||||
#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U)
|
||||
#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
|
||||
#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
|
||||
|
||||
|
||||
|
||||
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
|
||||
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*
|
||||
* I/O ports initial setup, this configuration is established soon after reset
|
||||
* in the initialization code.
|
||||
@ -908,6 +923,9 @@
|
||||
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN15, 0U))
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -21,11 +21,7 @@ enum custom_macros {
|
||||
R_POINT
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM fn_actions[] = {
|
||||
[0] = ACTION_LAYER_TAP_KEY(_LOWER, KC_SPC), //Hold for momentary Lower layer, Tap for Space,
|
||||
};
|
||||
|
||||
#define SPC_LW FUNC(0)
|
||||
#define SPC_LW LT(_LOWER, KC_SPC)
|
||||
#define MSE MO(_MOUSE)
|
||||
#define PIPE M(R_PIPE)
|
||||
#define POINT M(R_POINT)
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
@ -20,14 +20,76 @@
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
#include "stm32_gpio.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
* @brief Type of STM32 GPIO port setup.
|
||||
*/
|
||||
const PALConfig pal_default_config = {
|
||||
typedef struct {
|
||||
uint32_t moder;
|
||||
uint32_t otyper;
|
||||
uint32_t ospeedr;
|
||||
uint32_t pupdr;
|
||||
uint32_t odr;
|
||||
uint32_t afrl;
|
||||
uint32_t afrh;
|
||||
} gpio_setup_t;
|
||||
|
||||
/**
|
||||
* @brief Type of STM32 GPIO initialization data.
|
||||
*/
|
||||
typedef struct {
|
||||
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
|
||||
gpio_setup_t PAData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
|
||||
gpio_setup_t PBData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
|
||||
gpio_setup_t PCData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
|
||||
gpio_setup_t PDData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
|
||||
gpio_setup_t PEData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
|
||||
gpio_setup_t PFData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
|
||||
gpio_setup_t PGData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
|
||||
gpio_setup_t PHData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
|
||||
gpio_setup_t PIData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
|
||||
gpio_setup_t PJData;
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
|
||||
gpio_setup_t PKData;
|
||||
#endif
|
||||
} gpio_config_t;
|
||||
|
||||
/**
|
||||
* @brief STM32 GPIO static initialization data.
|
||||
*/
|
||||
static const gpio_config_t gpio_default_config = {
|
||||
#if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
||||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
@ -62,24 +124,117 @@ const PALConfig pal_default_config = {
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
|
||||
VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
|
||||
VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
void enter_bootloader_mode_if_requested(void);
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
|
||||
|
||||
gpiop->OTYPER = config->otyper;
|
||||
gpiop->OSPEEDR = config->ospeedr;
|
||||
gpiop->PUPDR = config->pupdr;
|
||||
gpiop->ODR = config->odr;
|
||||
gpiop->AFRL = config->afrl;
|
||||
gpiop->AFRH = config->afrh;
|
||||
gpiop->MODER = config->moder;
|
||||
}
|
||||
|
||||
static void stm32_gpio_init(void) {
|
||||
|
||||
/* Enabling GPIO-related clocks, the mask comes from the
|
||||
registry header file.*/
|
||||
rccResetAHB(STM32_GPIO_EN_MASK);
|
||||
rccEnableAHB(STM32_GPIO_EN_MASK, true);
|
||||
|
||||
/* Initializing all the defined GPIO ports.*/
|
||||
#if STM32_HAS_GPIOA
|
||||
gpio_init(GPIOA, &gpio_default_config.PAData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
gpio_init(GPIOB, &gpio_default_config.PBData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
gpio_init(GPIOC, &gpio_default_config.PCData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
gpio_init(GPIOD, &gpio_default_config.PDData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
gpio_init(GPIOE, &gpio_default_config.PEData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
gpio_init(GPIOF, &gpio_default_config.PFData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
gpio_init(GPIOG, &gpio_default_config.PGData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
gpio_init(GPIOH, &gpio_default_config.PHData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
gpio_init(GPIOI, &gpio_default_config.PIData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOJ
|
||||
gpio_init(GPIOJ, &gpio_default_config.PJData);
|
||||
#endif
|
||||
#if STM32_HAS_GPIOK
|
||||
gpio_init(GPIOK, &gpio_default_config.PKData);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
* @details GPIO ports and system clocks are initialized before everything
|
||||
* else.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
extern void enter_bootloader_mode_if_requested(void);
|
||||
enter_bootloader_mode_if_requested();
|
||||
stm32_gpio_init();
|
||||
stm32_clock_init();
|
||||
}
|
||||
|
||||
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief SDC card detection.
|
||||
*/
|
||||
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||||
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDC card write protection detection.
|
||||
*/
|
||||
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||||
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return false;
|
||||
}
|
||||
#endif /* HAL_USE_SDC */
|
||||
|
||||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||||
/**
|
||||
@ -108,4 +263,6 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
SYSCFG->CFGR1 |= SYSCFG_CFGR1_I2C1_DMA_RMP;
|
||||
SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_SPI2_DMA_RMP);
|
||||
}
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user