James Young d1547320a0
Migrate LOCKING_*_ENABLE to Data-Driven: H, Part 2 (#23762)
Affects:

  - `handwired/108key_trackpoint`
  - `handwired/2x5keypad`
  - `handwired/3dp660`
  - `handwired/412_64`
  - `handwired/42`
  - `handwired/amigopunk`
  - `handwired/aranck`
  - `handwired/atreus50`
  - `handwired/axon`
  - `handwired/battleship_gamepad`
  - `handwired/bdn9_ble`
  - `handwired/bento/rev1`
  - `handwired/bolek`
  - `handwired/brain`
  - `handwired/bstk100`
  - `handwired/cans12er`
  - `handwired/chiron`
  - `handwired/ck4x4`
  - `handwired/cmd60`
  - `handwired/co60/rev6`
  - `handwired/co60/rev7`
  - `handwired/colorlice`
  - `handwired/curiosity`
  - `handwired/dactyl_left`
  - `handwired/dactyl_manuform/4x5`
  - `handwired/dactyl_manuform/4x5_5`
  - `handwired/dactyl_manuform/4x6`
  - `handwired/dactyl_manuform/4x6_4_3`
  - `handwired/dactyl_manuform/4x6_5`
  - `handwired/dactyl_manuform/5x6`
  - `handwired/dactyl_manuform/5x6_2_5`
  - `handwired/dactyl_manuform/5x6_5`
  - `handwired/dactyl_manuform/5x6_6`
  - `handwired/dactyl_manuform/5x6_68`
  - `handwired/dactyl_manuform/5x7`
  - `handwired/dactyl_manuform/6x6/blackpill_f411`
  - `handwired/dactyl_manuform/6x6/promicro`
  - `handwired/dactyl_manuform/6x6_4`
  - `handwired/dactyl_manuform/6x7`
  - `handwired/dactyl_promicro`
  - `handwired/dactyl_rah`
  - `handwired/datahand`
  - `handwired/evk/v1_3`
  - `handwired/fc200rt_qmk`
  - `handwired/fivethirteen`
  - `handwired/floorboard`
  - `handwired/fruity60`
  - `handwired/gamenum`
  - `handwired/hacked_motospeed`
  - `handwired/heisenberg`
  - `handwired/hnah40`
2024-05-22 10:53:40 +01:00

39 lines
1.2 KiB
C

#pragma once
#ifdef PS2_DRIVER_USART
#define PS2_CLOCK_PIN D5
#define PS2_DATA_PIN D2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */
#define PS2_USART_INIT() do { \
PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
UCSR1C = ((1 << UMSEL10) | \
(3 << UPM10) | \
(0 << USBS1) | \
(3 << UCSZ10) | \
(0 << UCPOL1)); \
UCSR1A = 0; \
UBRR1H = 0; \
UBRR1L = 0; \
} while (0)
#define PS2_USART_RX_INT_ON() do { \
UCSR1B = ((1 << RXCIE1) | \
(1 << RXEN1)); \
} while (0)
#define PS2_USART_RX_POLL_ON() do { \
UCSR1B = (1 << RXEN1); \
} while (0)
#define PS2_USART_OFF() do { \
UCSR1C = 0; \
UCSR1B &= ~((1 << RXEN1) | \
(1 << TXEN1)); \
} while (0)
#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
#define PS2_USART_RX_DATA UDR1
#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
#define PS2_USART_RX_VECT USART1_RX_vect
#endif