Update ARM_CRx_No_GIC port (#1101)
This PR makes the following improvements to the ARM_CRx_No_GIC port-
1. Remove inline assembly and move all the assembly code to the portASM.S
file.
2. Add support for configUSE_TASK_FPU_SUPPORT -
- When configUSE_TASK_FPU_SUPPORT is defined to 1, tasks are created
without floating point context. Tasks that want to use floating point, need
to call portTASK_USES_FLOATING_POINT(). This is the current behavior.
- When configUSE_TASK_FPU_SUPPORT is defined to 2, each task is created
with a floating point context.
If left undefined, configUSE_TASK_FPU_SUPPORT defaults to 1 for backward compatibility.
3. The application writer can now implement vApplicationSVCHandler to handle the
SVC calls raised within the application. SVC 0 is used for the yield kernel operation
and the application can use all the SVC calls other than 0.
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
This commit is contained in:
Rahul Kar
@ -28,6 +28,7 @@
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/* Standard includes. */
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#include <stdlib.h>
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#include <string.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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@ -80,13 +81,22 @@
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* The space on the stack required to hold the FPU registers. */
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#if ( configFPU_D32 == 1 )
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#define portFPU_REGISTER_WORDS ( ( 32 * 2 ) + 1 ) /* D0-D31 and FPSCR. */
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#else
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#define portFPU_REGISTER_WORDS ( ( 16 * 2 ) + 1 ) /* D0-D15 and FPSCR. */
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#endif /* configFPU_D32 */
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/*-----------------------------------------------------------*/
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/*
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* Starts the first task executing. This function is necessarily written in
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* assembly code so is implemented in portASM.s.
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* These functions are necessarily written in assembly code, so are implemented
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* in portASM.S.
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*/
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extern void vPortRestoreTaskContext( void );
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extern void vPortInitialiseFPSCR( void );
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extern uint32_t ulReadAPSR( void );
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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@ -184,12 +194,33 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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/* The task will start with a critical nesting count of 0 as interrupts are
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* enabled. */
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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pxTopOfStack--;
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/* The task will start without a floating point context. A task that uses
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* the floating point hardware must call vPortTaskUsesFPU() before executing
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* any floating point instructions. */
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*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
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#if ( configUSE_TASK_FPU_SUPPORT == 1 )
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{
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/* The task will start without a floating point context. A task that uses
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* the floating point hardware must call vPortTaskUsesFPU() before executing
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* any floating point instructions. */
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pxTopOfStack--;
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*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
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}
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#elif ( configUSE_TASK_FPU_SUPPORT == 2 )
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{
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/* The task will start with a floating point context. Leave enough
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* space for the registers - and ensure they are initialised to 0. */
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pxTopOfStack -= portFPU_REGISTER_WORDS;
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memset( pxTopOfStack, 0x00, portFPU_REGISTER_WORDS * sizeof( StackType_t ) );
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/* Initialise the slot containing ulPortTaskHasFPUContext to true as
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* the task starts with a floating point context. */
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pxTopOfStack--;
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*pxTopOfStack = pdTRUE;
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ulPortTaskHasFPUContext = pdTRUE;
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}
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#else
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{
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#error "Invalid configUSE_TASK_FPU_SUPPORT value - configUSE_TASK_FPU_SUPPORT must be set to 1, 2, or left undefined."
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}
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#endif /* if ( configUSE_TASK_FPU_SUPPORT == 1 ) */
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return pxTopOfStack;
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}
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@ -218,7 +249,7 @@ BaseType_t xPortStartScheduler( void )
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/* Only continue if the CPU is not in User mode. The CPU must be in a
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* Privileged mode for the scheduler to start. */
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__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR )::"memory" );
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ulAPSR = ulReadAPSR();
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ulAPSR &= portAPSR_MODE_BITS_MASK;
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configASSERT( ulAPSR != portAPSR_USER_MODE );
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@ -310,15 +341,17 @@ void FreeRTOS_Tick_Handler( void )
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}
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/*-----------------------------------------------------------*/
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void vPortTaskUsesFPU( void )
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{
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uint32_t ulInitialFPSCR = 0;
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#if ( configUSE_TASK_FPU_SUPPORT != 2 )
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/* A task is registering the fact that it needs an FPU context. Set the
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* FPU flag (which is saved as part of the task context). */
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ulPortTaskHasFPUContext = pdTRUE;
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void vPortTaskUsesFPU( void )
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{
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/* A task is registering the fact that it needs an FPU context. Set the
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* FPU flag (which is saved as part of the task context). */
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ulPortTaskHasFPUContext = pdTRUE;
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/* Initialise the floating point status register. */
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__asm volatile ( "FMXR FPSCR, %0" ::"r" ( ulInitialFPSCR ) : "memory" );
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}
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/* Initialise the floating point status register. */
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vPortInitialiseFPSCR();
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}
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#endif /* configUSE_TASK_FPU_SUPPORT */
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/*-----------------------------------------------------------*/
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File diff suppressed because it is too large
Load Diff
@ -59,7 +59,7 @@ typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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* not need to be guarded with a critical section. */
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@ -88,47 +88,31 @@ typedef uint32_t TickType_t;
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}
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portYIELD() \
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__asm volatile ( "SWI 0 \n" \
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"ISB " ::: "memory" );
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void vPortYield( void );
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/*-----------------------------------------------------------
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* Critical section control
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*----------------------------------------------------------*/
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#define portYIELD() vPortYield();
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/*-----------------------------------------------------------*/
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/*
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* Critical section management.
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*/
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern uint32_t ulPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
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extern void vPortInstallFreeRTOSVectorTable( void );
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/* The I bit within the CPSR. */
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#define portINTERRUPT_ENABLE_BIT ( 1 << 7 )
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extern void vPortEnableInterrupts( void );
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extern void vPortDisableInterrupts( void );
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extern uint32_t ulPortSetInterruptMaskFromISR( void );
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/* In the absence of a priority mask register, these functions and macros
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* globally enable and disable interrupts. */
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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#define portENABLE_INTERRUPTS() __asm volatile ( "CPSIE i \n" ::: "memory" );
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#define portDISABLE_INTERRUPTS() \
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__asm volatile ( "CPSID i \n" \
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"DSB \n" \
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"ISB " ::: "memory" );
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__attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_SET_INTERRUPT_MASK_FROM_ISR( void )
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{
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volatile uint32_t ulCPSR;
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__asm volatile ( "MRS %0, CPSR" : "=r" ( ulCPSR )::"memory" );
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ulCPSR &= portINTERRUPT_ENABLE_BIT;
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portDISABLE_INTERRUPTS();
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return ulCPSR;
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}
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#define portSET_INTERRUPT_MASK_FROM_ISR() portINLINE_SET_INTERRUPT_MASK_FROM_ISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) do { if( x == 0 ) portENABLE_INTERRUPTS( ); } while( 0 )
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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#define portENABLE_INTERRUPTS() vPortEnableInterrupts();
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#define portDISABLE_INTERRUPTS() vPortDisableInterrupts();
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMaskFromISR();
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) do { if( x == 0 ) portENABLE_INTERRUPTS(); } while( 0 )
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/*-----------------------------------------------------------*/
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@ -148,9 +132,27 @@ __attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_SET_INTER
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* handler for whichever peripheral is used to generate the RTOS tick. */
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void FreeRTOS_Tick_Handler( void );
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/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
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* before any floating point instructions are executed. */
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void vPortTaskUsesFPU( void );
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/**
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* @brief Returns the number of leading zeros in a 32 bit variable.
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*
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* @param[in] ulBitmap 32-Bit number to count leading zeros in.
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*
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* @return The number of leading zeros in ulBitmap.
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*/
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UBaseType_t ulPortCountLeadingZeros( UBaseType_t ulBitmap );
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/* If configUSE_TASK_FPU_SUPPORT is set to 1 (or left undefined) then tasks are
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* created without an FPU context and must call vPortTaskUsesFPU() to give
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* themselves an FPU context before using any FPU instructions. If
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* configUSE_TASK_FPU_SUPPORT is set to 2 then all tasks will have an FPU
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* context by default. */
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#if ( configUSE_TASK_FPU_SUPPORT != 2 )
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void vPortTaskUsesFPU( void );
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#else
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/* Each task has an FPU context already, so define this function as a
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* no-op. */
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#define vPortTaskUsesFPU()
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#endif
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#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
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#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
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@ -163,19 +165,15 @@ void vPortTaskUsesFPU( void );
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Store/clear the ready priorities in a bit map. */
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/* Store, clear and get the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ulPortCountLeadingZeros( ( uxTopReadyPriority ) ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#define portNOP() __asm volatile ( "NOP" )
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#define portINLINE __inline
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#define portINLINE __inline
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#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
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/* *INDENT-OFF* */
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