* Fix kexcept function
* Create dummy pxCurrentTCBs for xcore.ai port
* Additional commentary
* Add a layer of indirection to cope with singlecore
* Clarify use of _DoException
FreeRTOS MPU: Add privileged execute never MPU attribute
A new MPU region attribute Privileged eXecute Never (PXN)
is introduced in Armv8.1-M architecture, where if an MPU
region has PXN attribute set and the processor attempts
to execute the code inside with privileged level,
the Memory Management Fault exception would be triggered,
with IACCVIOL bit in MemManage Fault State Register set
to 1. The PXN feature allows privileged software to ensure
specific application tasks (threads) to execute in
unprivileged level only.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
In `prvCheckForRunStateChange()`, enabling interrupts should cause this core to immediately service the pending interrupt and yield. Upon the next scheduling of the task, the assertion `configASSERT(pxThisTCB->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD);` may not be true, as other cores could have requested a yield for this task before it evaluates its run state within the assertion. To address this, the task re-evaluates its run state in critical section within a loop until it is eligible for execution, which is the current implementation. Consequently, this assertion should be removed to ensure correct behavior.
* Fix traceMALLOC() memory count is inaccurate. (#1078)
Modify xWantedSize to the size of a free block when not split blocks.
Ensure that the sizes within traceMALLOC() and traceFREE() macros are equal.
* Create a new variable xAllocatedBlockSize for traceMALLOC()
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Add traceSTARTING_SCHEDULER tracing hook.
Discussed here: https://forums.freertos.org/t/tracing-improvements/20097
This hook enables tracers to run code on startup after all RTOS
resources are created and to detect that the scheduler is starting without
relying on traceENTER/traceEXIT macros.
It also provides tracers access to the task handle of all IDLE tasks,
allowing them to be identified unambiguously and without relying on
INCLUDE_xTaskGetIdleTaskHandle.
Use _GNU_SOURCE macro instead of __USE_GNU and define it before
including portmacro.h. The reason is that portmacro.h includes limits.h
which in-turn includes features.h - this results in __USE_GNU getting
incorrectly undefined.
Discussed here: https://forums.freertos.org/t/tracing-improvements/20097
Adds a note to the (confusingly named) xTaskNumber member of TaskStatus_t
explaining that the value is different to the TaskNumber that can be
accessed using the vTaskSetTaskNumber and vTaskGetTaskNumber functions.
The value returned is actually the value of uxTCBNumber in the TCB.
* Add _Noreturn attribute in the template function to fix MISRA 17.11 advisory warnings
* Add _Noreturn attribute in function declaration
* Code review suggestions
Earlier the code was suspending the current thread after calling
vTaskSwitchContext. This left a gap where the current thread could
access incorrect pxCurrentTCB after it was changed by
vTaskSwitchContext.
This commit addresses the problem by suspending the current thread
before calling vTaskSwitchContext.
It was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1054.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add configUSE_TASK_FPU_SUPPORT to AARCH64 port
NEON SIMD is required by standard AARCH64 and its registers are
frequently utilized by standard functions such as memcpy().
This means that even simple tasks that do not use any floating point
arithmetics may still alter the contents of the FPU registers.
For this reason it makes sense to add support for
configUSE_TASK_FPU_SUPPORT to be able to enforce FPU register saving and
restoring globally.
The implementation was largely adopted from the ARM_CA9 port. However,
the FPU registers must be placed on the stack before the critical
nesting count to match the AARCH64 portASM.S.
Add GCC/ARM_CM0/mpu_wrappers_v2_asm.c and GCC/ARM_CM0/portasm.c as source files to 'freertos_kernel_port' library.
This fixes the FREERTOS_PORT "GCC_ARM_CM0" CMake configuration.
Currently in Armv8-M GCC/ArmClang ports, constant pool is used to
define literals needed for `ldr` instructions. However, those
constant pools are defined with `.align 4` which increases code size.
Instead of defining the constant pool with `.align 4`, let the
compiler hanlde the constant pool and the required alignment.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The `portable/ThirdParty/GCC/ARM_TFM/README.md` and
`portable/ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c` are updated to
support `TF-Mv2.0.0` of trusted-firmware-m release.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
The difference between a stream buffer and a stream batching buffer is when
a task performs read on a non-empty buffer:
- The task reading from a non-empty stream buffer returns immediately
regardless of the amount of data in the buffer.
- The task reading from a non-empty steam batching buffer blocks until the
amount of data in the buffer exceeds the trigger level or the block time
expires.
* Add readme to example directory
* Add readme to example directory
* Add readme to example directory
* Add readme to example directory
* remove whitespace
* Update wording
* Update examples/README.md
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
* Add Coverity webpage link
---------
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Update alignment in ARM_CR5 port.
This is the same patch as 553caa18ce
provided by Richard Barry for issue #426 (ARM_CA9).
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
