vppinfra: SFENCE requires SSE2 to be enabled
Change-Id: I0469bb91107cf0acced3cd19820db8d3712701c0 Type: fix Fixes: eaabe07 Signed-off-by: Damjan Marion <damarion@cisco.com>
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Damjan Marion
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Florin Coras
parent
6a1a832346
commit
687823f017
@ -181,7 +181,7 @@
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/* Full memory barrier (read and write). */
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#define CLIB_MEMORY_BARRIER() __sync_synchronize ()
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#if __x86_64__
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#if __SSE__
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#define CLIB_MEMORY_STORE_BARRIER() __builtin_ia32_sfence ()
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#else
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#define CLIB_MEMORY_STORE_BARRIER() __sync_synchronize ()
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