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crypto: align per thread data to cache line

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Type: improvement

Change-Id: I6bad46403c07b211dfda7229aed1b5e19342865f
Signed-off-by: Filip Tehlar <ftehlar@cisco.com>
This commit is contained in:
Filip Tehlar
2020-03-05 16:41:27 +00:00
committed by Dave Barach
parent 1322375357
commit fb8ed8b955
2 changed files with 4 additions and 1 deletions
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4
src/plugins/crypto_ipsecmb/ipsecmb.c
View File

@ -30,6 +30,7 @@
typedef struct
{
CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
MB_MGR *mgr;
__m128i cbc_iv;
} ipsecmb_per_thread_data_t;
@ -522,7 +523,8 @@ crypto_ipsecmb_init (vlib_main_t * vm)
IMB_VERSION_STR, 0);
eidx = vnet_crypto_register_engine (vm, "ipsecmb", 80, (char *) name);
vec_validate (imbm->per_thread_data, tm->n_vlib_mains - 1);
vec_validate_aligned (imbm->per_thread_data, tm->n_vlib_mains - 1,
CLIB_CACHE_LINE_BYTES);
/* *INDENT-OFF* */
vec_foreach (ptd, imbm->per_thread_data)

1
src/plugins/crypto_native/crypto_native.h
View File

@ -22,6 +22,7 @@ typedef void *(crypto_native_key_fn_t) (vnet_crypto_key_t * key);
typedef struct
{
CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
u8x16 cbc_iv[4];
} crypto_native_per_thread_data_t;