Commit Graph

26 Commits

Author SHA1 Message Date
Damjan Marion
8799bf6ca6 build: add option to specify supported OS list for plugin
Type: improvement
Change-Id: I0d6f11d5ece19c5e0e00dfdadc9d4c09274ae8e1
Signed-off-by: Damjan Marion <damarion@cisco.com>
2024-03-18 16:01:25 +00:00
Zachary Leaf
af82211d33 perfmon: add Arm event bundles
Included statistic bundles (all NODE type):
  - Instructions and CPU cycles, including IPC
  - Data cache access/refills/%
  - Data TLB cache access/refills/%
  - Instruction cache access/refills/%
  - Instruction TLB cache access/refills/%
  - Memory/Bus accesses, memory errors
  - Branch (mis)predictions, architecturally & speculatively executed
  - Processor frontend/backend stalls (stalled cycles)

Type: feature
Signed-off-by: Zachary Leaf <zachary.leaf@arm.com>
Tested-by: Jieqiang Wang <jieqiang.wang@arm.com>
Change-Id: I7ea4a27c8df8fc7222b743a98bdceaff727e4112
2022-07-12 15:29:23 +00:00
Zachary Leaf
268d7be66b perfmon: enable perfmon plugin for Arm
This patch enables statistics from the Arm PMUv3 through the perfmon
plugin.

In comparison to using the Linux "perf" tool, it allows obtaining
direct, per node level statistics (rather than per thread). By accessing
the PMU counter registers directly from userspace, we can avoid the
overhead of using a read() system call and get more accurate and fine
grained statistics about the running of individual nodes.

A demo of perfmon on Arm can be found at:
https://asciinema.org/a/egVNN1OF7JEKHYmfl5bpDYxfF

*Important Note*
Perfmon on Arm is dependent on and works only on Linux kernel versions
of v5.17+ as this is when userspace access to Arm perf counters was
included.

On most Arm systems, a maximum of 7 PMU events can be configured at once
- (6x PMU events + 1x CPU_CYCLE counter). If some perf counters are in
use elsewhere by other applications, and there are insufficient counters
remaining to open the bundle, the perf_event_open call will fail
(provided the events are grouped with the group_fd param, which perfmon
currently utilises).

See arm/events.h for a list of PMUv3 events available, although it is
implementation defined whether most events are implemented or not. Only
a small set of 7 events is required to be implemented in Armv8.0, with
some additional events required in later versions. As such, depending on
the implementation, some statistics may not be available. See Arm
Architecture Reference Manual for Armv8-A, D7.10.2 "The PMU event number
space and common events" for more information.

arm/events.c:arm_init() gets information from the sysfs about what
events are implemented on a particular CPU at runtime. Arm's
implementation of the perfmon source callback .bundle_support uses this
information to disable unsupported events in a bundle, or in the case
no events are supported, disable the entire bundle.

Where a particular event in a bundle is not implemented, the statistic
for that event is shown as '-' in the 'show perfmon statistics' cli
output, by disabling the column.

There is additional code in perfmon.c to only open events which are
marked as implemented. Since we're only opening and reading events that
are implemented, some extra logic is required in cli.c to re-align
either perfmon_node_stats_t or perfmon_reading_t with the column
headings configured in each bundle, taking into account disabled
columns.

Userspace access to perf counters is disabled by default, and needs to
be enabled with 'sudo sysctl kernel/perf_user_access=1'.

There is a check built into the Arm event source init function
(arm/events.c:arm_init) to check that userspace reading of perf counters
is enabled in the /proc/sys/kernel/perf_user_access file.

If the above file does not exist, it means the kernel version is
unsupported. Users without a supported kernel will see a warning
message, and no Arm bundles will be registered to use in perfmon.

Enabling/using plugin:
  - include the following in startup.conf:
    - plugins { plugin perfmon_plugin.so { enable }
  - 'show perfmon bundle [verbose]' - show available statistics bundles
  - 'perfmon start bundle <bundle-name>' - enable and start logging
  - 'perfmon stop' - stop logging
  - 'show perfmon statistics' - show output

For a general guide on using and understanding Arm PMUv3 events, see
https://community.arm.com/arm-community-blogs/b/tools-software-ides-blog/posts/arm-neoverse-n1-performance-analysis-methodology

Type: feature
Signed-off-by: Zachary Leaf <zachary.leaf@arm.com>
Tested-by: Jieqiang Wang <jieqiang.wang@arm.com>
Change-Id: I0620fe5b1bbe78842dfb1d0b6a060bb99e777651
2022-07-12 15:29:23 +00:00
Zachary Leaf
c7d43a5eb1 perfmon: make less arch dependent
In preparation for enabling perfmon on Arm platforms, move some Intel
/arch specific logic into the /intel directory and update the CMake to
split the common code from arch specific files.

Since the dispatch_wrapper code is very different on Arm/Intel,
each arch can provide their own implementation + conduct any additional
arch specific config e.g. on Intel, all indexes from the mmap pages are
cached. The new method intel_config_dispatch_wrapper conducts this
config and returns a pointer to the dispatch wrapper to use.

Similarly, is_bundle_supported() looks very different on Arm/Intel, so
each implementation is to provide their own arch specific checks.

Two new callbacks/function ptrs are added in PERFMON_REGISTER_SOURCE to
support this - .bundle_support and .config_dispatch_wrapper.

Type: refactor
Signed-off-by: Zachary Leaf <zachary.leaf@arm.com>
Change-Id: Idd121ddcfd1cc80a57c949cecd64eb2db0ac8be3
2022-07-12 15:29:23 +00:00
Ray Kinsella
53e575ce8a perfmon: fix order in cmakelists.txt
Fix ordering in CMakeLists.txt

Type: refactor

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I8e71e4fbc048a80c4b250c2a66cfd8a522bde5f4
2022-03-29 10:10:48 +00:00
Ray Kinsella
489d89c1cb perfmon: show distribution of uops delivered to frontend
Breakdown the distribution of uops delivered to the frontend.
Collerates directly with the source of the uops.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I93a57dbe56dfa0f378527844aa4e63f45a548e55
2022-02-18 14:50:07 +00:00
Ray Kinsella
9d0c638b0f perfmon: topdown level 1 and 2 for icx
Topdown level 1 and 2 for Intel Ice Lake (ICX). Limiting topdown support
to THREAD for the moment on Ice Lake, as NODE support is still
unreliable. Also removing Topdown Level 1 from Sapphire Rapids onwards,
as Topdown LeveL 2 also shows Level 1 on Sapphire, and it reduces the
overall number of bundles.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Iaa68b711dc8b6fb1090880b411debadb3c37f8bc
2022-01-30 15:08:18 +00:00
Ray Kinsella
fe85d87235 perfmon: topdown backend bound core bundle
Add a bundle to measure topdown backend bound core cycles, will indicate if any
given execution port has contention.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I37d1b38c101ac42d51c10fa4452b822d34b729c9
2022-01-30 14:43:34 +00:00
Ray Kinsella
4a6306aa69 perfmon: frontend and backend boundness bundles
Renamed memory stalls to topdown backend-bound-mem, added topdown
frontend-bound-latency and frontend-bound-bandwidth.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I70f42b6b63fe2502635cad4aed4271e2bbdda5f1
2022-01-27 20:02:24 +00:00
Ray Kinsella
e75084025a perfmon: rename bundle to memory stalls
Rename the memory bandwidth bundle to memory stalls, to differentiate it
from the bundle that measures memory controller bandwidth boundedness.

Type: refactor

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I828c73b6f769046e1ab592712bdf81ceefcd7911
2021-11-15 12:41:14 +00:00
Ray Kinsella
e15c999c30 perfmon: added bundle to measure pci bandwidth
Added an Intel Ice Lake specific bundles to measure pci bandwidth through the
Intel IO PMU. The "PCI" bundle measures read/writes from pci devices. The "CPU"
bundle measure read/writes from cpus to pci devices.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Id48cef5988113e8dc4690b97d22243311bfa7961
2021-11-02 22:25:40 +00:00
Ray Kinsella
12ba95bff5 perfmon: Topdown Level 1 support on Snowridge
Enable Topdown Level 1 support on Snowridge,
enabled with standard CPU events on small core.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I58ad09383de7464265ac1b69e683f253591e3b5e
2021-10-07 13:23:06 +00:00
Nathan Skrzypczak
0e6584014a vppinfra: move format_table from perfmon
This code seems really usefull for reuse in
other plugins, for pretty table formatting

Type: feature

Change-Id: Ib5784a0dfc81b7d5a5d1f5ccdd02072e460a50fb
Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
2021-09-17 20:10:59 +00:00
Damjan Marion
a274c3a2ed misc: put devtools plugins into separate component/package
Type: make
Change-Id: I2958e9eddadee6434766ecd3cdb3b9cea742ed64
Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-09-17 15:04:28 +00:00
Ray Kinsella
710bdef43c perfmon: add membw-bound bundle
Added memory bandwidth boundedness bundle, closely related to cache-hierarchy.
This bundle works on ICX only, due to an ICX specific counter.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Id385bd5f4e645ac020774e311c623afb64b79b1e
2021-09-08 14:30:03 +00:00
mdr78
8e1384f7bf perfmon: top down level 1 support
Adding perfmon node TMAM support on ICX.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I48a9a9ff6a72efc28eaf0cb11ef39fb62cebb126
2021-04-27 09:22:35 +00:00
Ray Kinsella
0614c6240b perfmon: % power level per node
Show % time spent per graph node in power level 0, 1 and 2.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I678ee812fa993af39568e9f9dfbf2396fc13ad42
2021-04-01 12:44:56 +00:00
Ray Kinsella
7b9b19d7bb perfmon: add branch mispredictions
Add branches, branches taken (a meteric for branchy code), and branch
misses.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: If92d4aaf9d0a6e3b99b8c19e6311cc08ca470590
2021-03-31 15:06:30 +00:00
Ray Kinsella
1e4309538d perfmon: added cache hits and misses
Added basic support for counting cache hits and misses per node.

Type: improvement

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Ic566611fd3d4246ccaa2117d8f74a569a6862e80
2021-01-21 13:17:47 +00:00
Damjan Marion
8b60fb0fe6 perfmon: new perfmon plugin
Type: feature
Change-Id: I2c14f82393d11fc05c6d229f5c58603ab5c0f14d
Signed-off-by: Damjan Marion <damarion@cisco.com>
2020-12-18 17:20:28 +00:00
Damjan Marion
f5b27cbcc7 misc: deprecate old perfmon
Type: refactor
Change-Id: I1303219f9f2a25d821737665903b0264edd3de32
Signed-off-by: Damjan Marion <damarion@cisco.com>
2020-12-18 17:20:28 +00:00
Tom Seidenberg
6c81f5a249 misc: add callback hooks and refactor pmc
Callbacks for monitoring and performance measurement:
- Add new callback list type, with context
- Add callbacks for API, CLI, and barrier sync
- Modify node dispatch callback to pass plugin-specific context
- Modify perfmon plugin to keep PMC samples local to the plugin
- Include process nodes in dispatch callback
- Pass dispatch function return value to callback

Type: refactor

Signed-off-by: Tom Seidenberg <tseidenb@cisco.com>
Change-Id: I28b06c58490611e08d76ff5b01b2347ba2109b22
2020-07-16 21:44:42 +00:00
Damjan Marion
47d165e4c1 perfmon: python to C parser for intel CPUs
EXAMPLE:
src/plugins/perfmon/intel_json_to_c.py \
  -i skylakex_core_v1.12.json \
  -o src/plugins/perfmon/perfmon_intel_skx.c \
  -m 0x55,0 \
  -m 0x55,1 \
  -m 0x55,2 \
  -m 0x55,3

Change-Id: I16ce059e231d340ecfcb6f6638e29c5b46304683
Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-03-20 03:06:52 -07:00
Dave Barach
bef3619d25 Improve perfmon json table picker
Built a tool to chew up https://download.01.org/perfmon/mapfile.csv,
and output a table in this format:

typedef struct {
  u8 model;
  u8 stepping;
  u8 has_stepping;
  char *filename;
} file_by_model_and_stepping_t;

static const file_by_model_and_stepping_t fms_table [] =
{
 /* model, stepping, stepping valid, file */
  { 0x2E, 0x0, 0, "NehalemEX_core_V2.json" },
  { 0x1E, 0x0, 0, "NehalemEP_core_V2.json" },
<snip>
  { 0x55, 0x5, 1, "cascadelakex_core_v1.00.json" },
  { 0x55, 0x6, 1, "cascadelakex_core_v1.00.json" },
  { 0x55, 0x7, 1, "cascadelakex_core_v1.00.json" },
<snip>

Change-Id: Ie0e8a7e851799e9d060b966047745039c066ec7b
Signed-off-by: Dave Barach <dave@barachs.net>
2018-12-17 23:12:54 +00:00
Dave Barach
5f1fd46573 Add x86_64 perfmon tables
The license issue is resolved, so we can package the .json
files. Added to the vpp-dev package in .tar.xz form, which saves a lot
of space.

Updated the perfmon error log entry: tell folks where to find the
compressed tarball, and how to extract it.

Change-Id: I3ed351fbf154cc3ba22d5f9c666acff77a2a14cf
Signed-off-by: Dave Barach <dave@barachs.net>
2018-10-25 01:04:44 +00:00
Dave Barach
4d1a866aff X86_64 perf counter plugin
Change-Id: Ie5a00c15ee9536cc61afab57f6cadc1aa1972f3c
Signed-off-by: Dave Barach <dave@barachs.net>
2018-10-22 12:02:04 +00:00